Chapter 4 Theory of Operation
DAQCard-700 User Manual 4-4 ni.com
When you first insert the card, the system examines information stored in
the DAQCard-700 Card Information Structure (CIS). This data is used to
configure the card for the system in which it is used. When the system has
assigned the card to a section of memory, it updates the PCMCIA control
registers and initializes the card.
The rest of the circuitry consists of address decoders, data buffers, I/O
channel interface timing control circuitry, and interrupt control circuitry.
The circuitry monitor uses CE1* (controlled by the PCMCIA Card and
Socket Services Software) as the card enable signal, and uses lines
<A0..A4> plus timing signals to generate the onboard register select signals
and read/write signals. The data buffers control the direction of data
transfer on the bidirectional data lines based on whether the transfer is a
read or write. The interrupt control circuitry routes any enabled interrupts
to the IREQ* line, which is routed to an available interrupt request line by
the system motherboard. The DAQCard-700 generates interrupts in three
different situations:
• When a prescribed number of A/D conversions can be read from FIFO
• When an active low-level signal is detected on the EXTINT* line
• When a rising-edge signal is detected on counter 2 output
Each one of these interrupts is individually enabled and cleared.
Analog Input and Data Acquisition Circuitry
The DAQCard-700 has 16 AI channels with 12-bit A/D conversion. Using
the timing circuitry, the DAQCard-700 can automatically time multiple
A/D conversions. Figure 4-3 shows a block diagram of the AI and DAQ
circuitry.
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