CHAPTER 7 SPECIFICATIONS
UNIVERGE NEAX 2000 IPS General Description Page 165
Issue 5
Major specifications and functionality of the UNIVERGE NEAX IPS
DMR
MP are shown below:
Item PN-CP31-D
Central Processing ElanSC520
System Memory CP31D: Flash ROM (16MB), SDRAM (64MB)
Network Switching Remote PIM
3-Way Conference 16 sets of 3-way conference circuitry
DTMF Signal Sender 32 circuits (digit 0 to 9, *, and # are generated)
Mini Jack 1 for External Music Source for MOH
Audible Tone Generator (DTG) Available
Phase Lock Oscillator (PLO) 2 ports (Source/Receiver)
Built-in FP0 Available
DTMF Receiver 4 circuits
Built-in DRS Available
MP Program Download (FTP) Available
Firmware Processor (FP)
Firmware Processors (FP) are required when more than two PIMs/Modular Chassis (MC) are
used. The FP provides supervision and status analysis of line/trunk ports, which reside in the
MC or PIM. The FP provides the bus interface for I/O Bus, PCM Bus, and Alarm Bus in a
multiple-PIM configuration. The major specifications of the FP are shown below:
• Central Processor Unit: 16-bit (25 MHz)
• Memory: Program Area (384 kb), Work Area (384 kb)
• BS01 Function
Name Code Remarks
PN-CP15
Firmware Processor Card used with the
UNIVERGE
NEAX 2000 IPS.
PN-CP33
Firmware Processor Card used with the
UNIVERGE NEAX 2000 IPS
DML
.
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