NEC UNIVERGE NEAX 2000 IPS - Chapter 7 Specifications; Processors

CHAPTER 7 SPECIFICATIONS
UNIVERGE NEAX 2000 IPS General Description Page 161
Issue 5
Chapter 7 Specifications
Processors
The UNIVERGE NEAX 2000 IPS, IPS
DML
, and IPS
DMR
are distributed multiprocessor systems.
Their control system consists of a Main Processor (MP), Firmware Processors (FP), and
Application Processors (AP). Both the FP and APs execute their predetermined functions under
the control of the MP.
DESCRIPTION SPECIFICATIONS
Control System Stored Program Control
Processor Type 32-Bit (ElanSC520)
Program Storage Flash ROM
Office Data Storage Flash ROM
Processor Architecture Central
Program Updates Floppy Disk
Time Division Matrix PCM Time Division (1,024 x 1.024; Non-Blocking)
Memory
MEMORY CAPACITY
CARD NAME
PROCESSOR
TYPE
ROM RAM
MP (PN-CP24-D)
32-Bit
(ElanSC520)
16MB
(Flash ROM)
64MB
(SDRAM)
MP (PN-CP27-B)
32-Bit
(ElanSC520)
8MB
(Flash ROM)
32MB
(SDRAM)
MP (PN-CP31-E)
32-Bit
(ElanSC520)
16MB
(Flash ROM)
64MB
(SDRAM)
MP (PN-CP31-D)
32-Bit
(ElanSC520)
16MB
(Flash ROM)
64MB
(SDRAM)
FP (PN-CP15) 16-bit (25MHz) === 768KB
FP (PN-CP33) 16-bit (25MHz) === 768KB
AP (PN-AP00-B) 16-bit (8MHz)
512KB
(Flash ROM)
512KB