After Sales
Technical Documentation
RAE/RAK–1N
PDA Hardware
Page 6 – 26
Original, 08/96
Table 17. External Signals and Connections, Outputs (continued)
ToSignal descriptionSignal Name
5VPDX 5V regulator powerdown PDAPWRU
XPWRON Power key (active low) B2B /
XPOWER-
ON,
LCMCON /
LCMXPOW-
ERON
RBUSRXD RBUS receive of CMT (CMT <– PDA) B2B /
RBUSRXD
RSTXD Serial data from PROCU module SIRU
RSENX RS buffer enable SIRU
RSSHDX RS buffer shutdown SIRU
IRSHD IR tranceiver shutdown SIRU
JTAGTDO JTAG data out Test pad
E103
BUZZEROUT Buzzer signal to buzzer on SIM module B2B /
BUZZER-
OUT
LP PDA LCD Line Pulse EMIU
PCLK PDA LCD Pixel Clock EMIU
FP PDA LCD Frame Pulse EMIU
LCDD(3:0) PDA LCD Data EMIU
DISPON PDA display on control signal EMIU
KEYD(2:0) Keymatrix drive lines EMIU
Block description
– PROCU Memories
Two types of memory is used: DRAM, and FLASH (ROM). The E3G CPU
has a 22 bits (26 bit internal) wide external address bus A(21:0) and an
16–bit data bus. The address bits A(25:11) are used for chip select
decoding. The decoding is done internally on the E3G CPU.
PROCU memory map is illustrated in figures 1 and 2 and in Table 31
DRAM (70 ns) is refreshed only when main battery is connected. As long
as the main battery has power and is connected all the DRAM data stays
valid. When the main battery is removed all the DRAM data is lost.
All application data is saved to nonvolatile FLASH memory under control
of flash file system (TFFS by M–Systems). Application status is not stored.
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