After Sales
Technical Documentation
RAE/RAK–1N
PDA Hardware
Page 6 – 36
Original, 08/96
Table 21. I/O Map (continued)
NoteAddressDevice
Chip Select Unit F400h – F463h E3G Specific
E3G Clock Unit F800h, F87Bh E3G Specific
E3G Bus Control Unit F810h – F813h E3G Specific
E3G Chip Configuration Regis-
ters
F820h – F825h E3G Specific
E3G I/O Ports Unit F860h – F87Bh E3G Specific
E3G LCD Controller F900h – F925h E3G Specific
E3G PWM Unit FC00h – FC01h E3G Specific
E3G EMS Registers FC10h – FC1Bh E3G Specific
E3G Key Scan Unit FC30h – FC39h E3G Specific
E3G Power Management FCA0h – FCB3h E3G Specific
Interrupt map
The interrupt control unit inside the E3G contains two 8259A modules,
connected in a cascade mode.
Table 22. Interrupt map
PC INT# IRQx Vector
(hex)
Name PC use
2 NMI 8 PMU INT Parity Error / IO Check
8 IRQ0 20 Timer 0 same
9 IRQ1 24 Key Scan logic 8042 Keyboard
A IRQ2 28 cascade vector same
B IRQ3 2C COM2 (RBUS) same
C IRQ4 30 COM1 (RS232) same
70 IRQ8 1C0 RTC same
72 IRQ10 1C8 Timer 1 (Not used but
available)
ISA