After Sales
Technical Documentation
RAE/RAK–1N
Baseband
Page 2–30
Original, 08/96
– frame structure control
– control of operations during a TDMA frame (with
ASIC)
– control of multiframe structure
– channel configuration control
– data functions
– RLP CRC calculation
– fax V110 frame encode/decode
– test functions
– functions for RF measurements
– debugging functions for product development
Technical description
Table 31. External Signals and Connections, Inputs
Signal Name Signal description From
VL2 Logic supply voltage. Max 150 mA. PWRU
DSPCLKEN Clock enable for DSP clock oscillator circuit ASIC
DSP1RSTX Reset for the DSP ASIC
PCMDATRCLKX PCM data input clock
DBUS data input clock
ASIC
PCMCOSYCLKX PCM data bit sync clock ASIC
CODEC_CLK PCM data output clock ASIC
PCMOUT Received audio in PCM format AUDIO
DBUSCLK DBUS data output clock ASIC
DBUSSYNC DBUS data bit sync clock ASIC
RDA DBUS received data B2B Conn.
INT0, INT1 Interrupts for the DSP ASIC
Table 32. External Signals and Connections, Outputs
Signal Name Signal description To
PCMIN Transmitted audio in PCM format AUDIO
IOX I/O enable. Indicates access to DSP I/O address space. ASIC
RWX Read/Write control ASIC
DSPAD(16:0) Address bus and control signals ASIC
TDA DBUS transmit data B2B Conn.
Table 33. External Signals and Connections, Bidirectional
Signal Name Signal description To/From
DSPDA(15:0) 16–bit data bus ASIC
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