Hardware description
If it is inconvenient to have a separate power supply on the external board, the nRF5340 PDK board can
supply power through the Debug out connector (P19). To enable this, short solder bridge SB47. Note that
as long as SB47 is shorted, it is not possible to program the onboard nRF5340 SoC even if the external
board is unplugged.
5.11 NFC antenna interface
The nRF5340 PDK board supports an NFC tag.
NFC-A listen mode operation is supported on the nRF5340 SoC. The NFC antenna input is available on
connector J5 on the nRF5340 PDK board.
Figure 28: NFC antenna connector
NFC uses two pins, W1 (NFC1) and AA1 (NFC2), to connect the antenna. These pins are shared with GPIOs
(P0.02 and P0.03) and the PROTECT field in the NFCPINS register in UICR defines the usage of these pins
and their protection level against abnormal voltages. The content of the NFCPINS register is reloaded at
every reset.
Note: The NFC pins are enabled by default.
NFC can be disabled and GPIOs enabled by defining the CONFIG_NFCT_PINS_AS_GPIOS variable in
the project settings. The way of doing this depends on the Integrated Development Environment
(IDE)/toolchain in use:
• When using SEGGER Embedded Studio, go to Project > Edit Options > Code > Preprocessor >
Preprocessor Definitions and add the CONFIG_NFCT_PINS_AS_GPIOS variable.
• When using Keil, go to Project > Options for Target > C/C++ > Preprocessor Symbols > Define
and add the CONFIG_NFCT_PINS_AS_GPIOS variable.
Pins W1 and AA1 are by default configured to use the NFC antenna, but if they are needed as normal
GPIOs, R43 and R46 must be NC and R42 and R45 must be shorted by 0R.
Figure 29: NFC input
4406_489 v1.0
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