USB and PCI Express
NVIDIA Jetson TX2 NX DG-10141-001_v1.1 | 24
Figure 6-7. Example PCIe Connections
Jetson
Tegra - PCIe
PEX
PEX
_TX0N
PEX_TX0P
PEX_L0_CLKREQ_N
PEX_L0_RST_N
PEX_L2_CLKREQ_N
PEX_L2_RST_N
PEX_WAKE_N
PEX
Control
PEX_CLK1_ N
PEX_CLK1_ P
PEX_RX0N
PEX_RX0P
PEX
_TX2N
PEX_T
X2P
PEX
_RX2N
PEX_RX2P
PEX
_TX4N
PEX_TX4P
PEX
_RX4N
PEX_RX4P
VDD_3V 3_ SYS
47kΩ
PCIE0_TX1_N
PCIE0_TX1_P
PCIE0_RX1_N
PCIE0_RX1_P
PCIE0_TX0_N
PCIE0_TX0_P
PCIE0_RX0_N
PCIE0_RX0_P
PCIE0_CLK_N
PCIE0_CLK_P
(PCIE1_TX0_N) RSVD
(PCIE1_TX0_P) RSVD
(P CIE 1_R X0 _ N) RSVD
(P CI E 1_R X0_ P) R S VD
(PCIE1_CLK_N) RSVD
(PCIE1_CLK_P) RSVD
PCIE0_CLKREQ*
PCI E 0_R ST*
(PCIE1_CLKREQ*) RSVD
(PCIE1_RST*) RSVD
PCIE_WAKE*
140
142
137
139
134
136
131
133
160
162
167
169
173
175
172
174
180
181
182
183
179
Shared
PCIe 0
(x2
- Ctrl #0 )
PCIe 1
(x1
- Ctrl #2 )
PCIe 0 Lane 1
PCIe 0 Lane 0
PCIe 0
(x2 - Ctrl #0 )
PCIe 1
(x1
- Ctrl #2 )
PEX_CLK3_ N
PEX_CLK3_ P
4.7 kΩ
47kΩ
4.7 kΩ
47kΩ
Se e No te 1
Notes:
1. AC Capacitors required on RX lines on carrier board if connected directly to device. Not
needed if connected to PCIe connector, M.2 Key M, etc. In those cases, the AC caps are on the
board plugged into those connectors.
2. See design guidelines for correct AC capacitor values.
3. The PCIe clock outputs comply to the PCIe CEM specification “REFCLK DC Specifications and
AC Timing Requirements.” The clocks are HCSL compatible as are the RX/TX signals.