Nvidia Jetson TX2 NX - Page 8

NVIDIA Jetson TX2 NX DG-10141-001_v1.1 | viii
Table 10-3. Audio Signal Connections .................................................................................... 56
Table 11-1. Jetson TX2 NX I2C Pin Description ...................................................................... 57
Table 11-2. I2C Interface Signal Routing Requirements ....................................................... 59
Table 11-3. I2C Signal Connections ........................................................................................ 59
Table 11-4. Jetson TX2 NX SPI Pin Description ..................................................................... 60
Table 11-5. SPI Interface Signal Routing Requirements ....................................................... 61
Table 11-6. Jetson TX2 NX CAN Pin Description .................................................................... 62
Table 11-7. Jetson TX2 NX Fan Pin Description ..................................................................... 63
Table 11-8. Jetson TX2 NX UART Pin Description .................................................................. 63
Table 11-9. UART Signal Connections .................................................................................... 64
Table 11-10. Jetson TX2 NX Debug UART Description ............................................................ 64
Table 11-11. Debug UART Connections .................................................................................... 65
Table 12-1. Pins Pulled and Driven High by Tegra X2 Prior to SYS_RESET* Inactive .......... 67
Table 12-2. Pins Pulled High on Module with External Resistors Prior to SYS_RESET_IN*
Inactive .................................................................................................................. 68
Table 13-1. Unused MPIO Pins and Pin Groups ..................................................................... 69
Table 15-1. Signal Type Codes ................................................................................................ 71
Table 15-2. Common High-Speed Interface Requirements .................................................. 74