NXP Semiconductors Layerscape LS1028A BSP - Page 128

3. Add bootargs as per the resolution.
• To support 480p resolution, add the following argument to bootargs (the minimum CMA size is 64M bytes):
video=720x480-32@60 cma=256M
• To support 720p resolution, add the following argument to bootargs:
video=1280x720-32@60 cma=256M
• To support 1080p resolution, add the following argument to bootargs:
video=1920x1080-32@60 cma=256M
• To support 4k resolution, add the following arguments to bootargs:
video=3840x2160-32@60 cma=256M
4. Boot up the kernel, you can see penguins on the DP monitor.
Refer to the following kernel boot up log:
[ 2.480536] [drm] found ARM Mali-DP500 version r1p2
[ 2.485571] i.mx8-hdp f1f0000.phy: lane_mapping 0x4e
[ 2.490561] i.mx8-hdp f1f0000.phy: edp_link_rate 0x06
[ 2.495631] i.mx8-hdp f1f0000.phy: dp_num_lanes 0x04
[ 2.500778] [drm] Started firmware!
[ 2.504281] [drm] CDN_API_CheckAlive returned ret = 0
[ 2.509354] [drm] Firmware version: 23029, Lib version: 20691
[ 2.515145] [drm] CDN_API_MainControl_blocking (ret = 0 resp = 1)
[ 2.521298] [drm] CDN_API_General_Test_Echo_Ext_blocking (ret = 0 echo_resp = echo test)
[ 2.529429] [drm] CDN_API_General_Write_Register_blockin ... setting LANES_CONFIG
[ 2.537001] [drm] pixel engine reset
[ 2.540599] [drm] CDN_*_Write_Register_blocking ... setting LANES_CONFIG 4e
[ 2.549371] [drm] AFE_init
[ 2.552095] [drm] deasserted reset
[ 2.555585] Wait for A2 ACK
[ 2.579947] [drm] AFE_power exit
[ 2.583184] [drm] CDN_API_DPTX_SetVideo_blocking (ret = 0)
[ 2.588772] mali-dp f080000.display: bound f1f0000.phy (ops imx_hdp_imx_ops)
[ 2.595960] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 2.602602] [drm] No driver support for vblank timestamp query.
[ 2.620556] [drm] pixel engine reset
[ 2.620569] [drm] CDN_*_Write_Register_blocking ... setting LANES_CONFIG 4e
[ 2.622354] [drm] AFE_init
[ 2.622370] [drm] deasserted reset
[ 2.622459] Wait for A2 ACK
[ 2.644648] [drm] AFE_power exit
[ 2.644654] [drm] CDN_API_DPTX_SetVideo_blocking (ret = 0)
[ 2.644675] [drm] CDN_API_DPTX_SetHostCap_blocking (ret = 0)
[ 2.647306] [drm] INFO: Full link training started
[ 2.649727] [drm] INFO: Clock recovery phase finished
[ 2.650540] [drm] INFO: Channel equalization phase finished
[ 2.650541] [drm] (last part meaning training finished)
[ 2.650573] [drm] INFO: Get Read Link Status (ret = 0) resp: rate: 20,
[ 2.650575] [drm] lanes: 4, vswing 0..3: 2 2 2, preemp 0..3: 2 1 1
[ 2.650761] [drm] CDN_API_DPTX_Set_VIC_blocking (ret = 0)
[ 2.650766] [drm] CDN_API_DPTX_SetVideo_blocking (ret = 0)
[ 2.698031] Console: switching to colour frame buffer device 480x135
Linux kernel
Layerscape LS1028A BSP User Guide, Rev. 0.3, 04/2019
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NXP Semiconductors