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NXP Semiconductors Layerscape LS1028A BSP - Page 9

NXP Semiconductors Layerscape LS1028A BSP
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Feature Description
FlexSPI
Read/Write/Erase
Read in AHB mode with Octal command support
Write in IP mode
Erase size: 128KB (u-boot)
Supported Flash device: MT35XU02G
UART
UART1, UART2 verified.
Default frequency: 115.2 kbps
DDR
Fixed Settings (RDB)
DDR SPD support (QDS)
Default frequency: 1600 MT/s
ENETC
Support for PF and VF ENETC PCIe Integrated Endpoints
Core transmit and receive side packet processing, PF and VF
Fast Rx buffer management with paged allocation and recycling
Multiple Rx and Tx queues supported, separate MSI-X per CPU
Scather/Gather and Jumbo frame (up to 9600B) support, Rx & Tx
MAC filtering, VLAN insertion/ extraction and VLAN filtering
Checksum offload: CHECKSUM_COMPLETE on Rx (INET CSUM)
Rx Frame Distribution (RSS) and Frame Classification (RFS)
PCIe SRIOV support to configure ENETC Virtual Functions (VFs)
L2Switch
Data transfer through switch ports
Switchdev support
TSN Qci, Qbv, Qbu, Qav, 802.1CB support
ENETC-TSN
1588 two steps time stamping support
Qbv, Qbu, Qci, Qav protocol support
Table continues on the next page...
Feature Support Matrix
Layerscape LS1028A BSP User Guide, Rev. 0.3, 04/2019
NXP Semiconductors
9

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