NXP Semiconductors MPC5748G - Page 27

5
CAN & LIN Physical
D
7
PB0
PB0
PB1
7
PB1
All CAN and LIN signals are
in power domain VDD_HV_A.
All interfaces will work at
3.3V or 5.0V (PER_HVA)
C
7
PC10
PC10
PC11
7
PC11
B
7
PB3
PB3
PB2
7
PB2
7
PC7
PC7
PC6
A
7
PC6
5
4
3
2
1
CAN0 Physical Interface
5V0_SR
PER_HVA
VDD - 5.0V input supply for CAN transceiver (4.5 to 5.5V)
VI/O - determines the signal level on MCU TX and RX pins
C59
C60
C52
C53
0.1UF
0.1UF
and can range from 2.8 to 5.5V
2.2UF
(0603
2.2UF
(0603
STB - High for Standby mode, pulled low for normal mode.
10V
10V
50V)
50V)
CAN termination resistor
footprint. Place on
D
GND
U1
3
5
GND
underside of PCB
(CAN0_TX)
R64
0
CAN0_TX
1
TXD
VD D
VIO
R1
120
P2
(CAN0_RX)
R63
0
CAN0_RX
4
RXD
CANH
7
CAN0-CANH
DNP
1
HDR_1X3
R51
4.70K CAN0-S
8
STB
CANL
6
CAN0-CANL
2
GN D
3
TPV16
GND
2
MC33901WEF
GND
GND
CAN1 Physical Interface
5V0_SR
PER_HVA
VDD - 5.0V input supply for CAN transceiver (4.5 to 5.5V)
C57
C58
C50
C51
CAN termination resistor
VI/O - determines the signal level on MCU TX and RX pins
footprint. Place on
2.2UF
0.1UF
2.2UF
0.1UF
and can range from 2.8 to 5.5V
10V
(0603
10V
(0603
underside of PCB
C
STB - High for Standby mode, pulled low for normal mode.
50V)
50V)
GND
U2
3
5
GND
(CAN1_TX)
R62
0
CAN1_TX
1
TXD
VD D
VIO
R2
120
P3
(CAN1_RX)
R59
0
CAN1_RX
4
RXD
CANH
7
CAN1-CANH
DNP
1
HDR_1X3
R50
4.70K CAN1-S
8
STB
CANL
6
CAN1-CANL
2
GN D
3
TPV15
GND
2
MC33901WEF
GND
GND
LIN0 Physical Interface
Master Mode Pullup Enable
R143
0
Configired as SLAVE by default
DNP
(Lin0 Supports Master and Slave)
J2
DNP
D50
GF1A
R18
2.0K
VSUP2
HDR_1X3
PER_HVA
U6
1
2
A
C
R17
2.0K
P7
B
(LIN0_RX)
R74
0
LIN0-RX
1
8
HDR 1X2
C
A
1
RXD
INH
1
(LIN0_TX)
R75
0
(Enable)
2
7
D51
GF1A
LIN0-VSUP
2
EN
VSUP
(Wake)
3
6
LIN0-LIN
3
WAKE
LIN
LIN0-TX
4
5
TXD
GND
Total current
C70
Battery
3 pin
GND
MC33662BLEF
GND
0.1UF
C69
through resistors
GND
MC33662LEF LIN transceiver is newer version of 33661 offering:
(LEF = 20K Baud)
(0603
2.2UF
Reverse
(LIN Bus at GND)
header
10V
polarity &
= 12mA (0.144W)
(NOT
- Full LIN compliance (33661 no longer compliant)
EN = PER_HVA enables Transceiver and sets I/O for VDD_HV_A
50V)
Pulse
Each resistor spec
Protection
Molex)
- Improved ESD protection on LIN pin up to 15KV
WAKE = GND ensures no spurious wakeups
= 0.1W (0.2W total)
- Improved ESD on Wake and VSUP Pins
GND
- Other EMC and performance improvements
LIN1 Physical Interface
See freescale.com for more details
Master Mode Pullup Enable
Configired as MASTER by default
(Lin1 only supports Master mode)
D52
GF1A
R6
2.0K
VSUP1
HDR_1X3
PER_HVA
U3
R144
0
A
C
R7
2.0K
P6
Automotive Microcontroller
(LIN1_RX)
R60
0
LIN1-RX
1
8
C
A
1
RXD
INH
1
Applications
(LIN1_TX)
R61
0
(Enable)
2
7
D53
GF1A
LIN1-VSUP
2
East Kilbride, Scotland
EN
VSUP
(Wake)
3
6
LIN1-LIN
3
A
(TXD_0)
WAKE
LIN
NXP General Business Use
LIN1-TX
4
5
TXD
GND
C56
Total current
Drawing Title:
MPC5748G-LCEVB
GND
MC33662BLEF
GND
0.1UF
C55
Battery
through resistors
GND
3 pin
(LEF = 20K Baud)
(0603
2.2UF
Reverse
(LIN Bus at GND)
10V
polarity &
= 12mA (0.144W)
header
Page Title:
50V)
Pulse
Each resistor spec
(NOT
CAN and LIN
EN = PER_HVA enables Transceiver and sets I/O for VDD_HV_A
Protection
= 0.1W (0.2W total)
Molex)
WAKE = GND ensures no spurious wakeups
Size
Document Number
Rev
GND
B
SCH-27897
PDF: SPF-27897
B
Date:
Friday, February 12, 2016
Sheet
9
of
15
4
3
2
1
Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.