Omron CJ1G/H-CPU series - Page 323

290
PLC Setup Section 7-1
High-speed Counter 0 Operation Settings
High-speed Counter 0 Enable/Disable
High-speed Counter 0 Counting Mode
High-speed Counter 0 Circular Max. Count (Ring Counter Maximum Value)
Programming
Console setting
address
Settings Default Function Related
Auxiliary
Area flags/
bits
Time when
setting is read
by CPU Unit
Word Bits
50 12 to 15 0 hex: Don’t Use
Counter.
1 hex*:
Use Counter
(60 kHz).
2 hex*:
Use Counter
(100 kHz).
0 hex Specifies whether or not high-speed
counter 0 is being used.
Note When high-speed counter 0 is
enabled (setting 1 or 2), the
input operation settings for
IN8 and IN9 are disabled. The
input operation setting for IN3
is also disabled if the reset
method is set to Phase-Z sig-
nal + software reset.
--- When power is
turned ON
Programming
Console setting
address
Settings Default Function Related
Auxiliary
Area flags/
bits
Time when
setting is read
by CPU Unit
Word Bits
50 08 to 11 0 hex:
Linear mode
1 hex:
Ring mode
0 hex Specifies the counting mode for high-
speed counter 0.
--- When operation
starts
Programming
Console setting
address
Settings Default Function Related
Auxiliary
Area flags/
bits
Time when
s
etting is read
by CPU Unit
Word Bits
51 00 to 15 00000000 to
FFFFFFFF hex
(See note.)
00000000
hex
Sets the max. ring count for high-
speed counter 0.
When the high-speed counter 0
counting mode is set to ring mode,
the count will be reset to 0 automati-
cally when the counter PV exceeds
the max. ring count.
A270
(Rightmost 4
digits of the
high-speed
counter 0
PV)
When operation
starts
52 00 to 15 A271
(Leftmost 4
digits of the
high-speed
counter 0
PV)