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Omron CJ1G/H-CPU series - Page 324

Omron CJ1G/H-CPU series
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291
PLC Setup Section 7-1
High-speed Counter 0 Reset Method
High-speed Counter 0 Pulse Input Setting (Pulse Input Mode)
Note When the CX-Programmer is being used to make the setting, the setting is
input in decimal.
High-speed Counter 1 Operation Settings
High-speed Counter 1 Enable/Disable
Programming
Console setting
address
Settings Default Function Related
Auxiliary
Area flags/
bits
Time when
setting is read
by CPU Unit
Word Bits
50 04 to 07 0 hex: Z phase,
software reset
(stop comparing)
1 hex: Software
reset (stop com-
paring)
2 hex: Z phase,
software reset
(continue com-
paring)
3 hex: Software
reset (continue
comparing)
0 hex Specifies the reset method for high-
speed counter 0.
--- When power is
turned ON
Programming
Console setting
address
Settings Default Function Related
Auxiliary
Area flags/
bits
Time when
setting is read
by CPU Unit
Word Bits
50 00 to 03 0 hex: Differential
phase inputs
1 hex: Pulse +
direction inputs
2 hex: Up/Down
inputs
3 hex: Increment
pulse input
0 hex Specifies the pulse-input method for
high-speed counter 0.
--- When power is
turned ON
Programming
Console setting
address
Settings Default Function Related
Auxiliary
Area flags/
bits
Time when
setting is read
by CPU Unit
Word Bits
53 12 to 15 0 hex: Don’t Use
Counter.
1 hex*:
Use Counter
(60 kHz).
2 hex*:
Use Counter
(100 kHz).
0 hex Specifies whether or not high-speed
counter 1 is being used.
Note When high-speed counter 1 is
enabled (setting 1 or 2), the
input operation settings for
IN6 and IN7 are disabled. The
input operation setting for IN2
is also disabled if the reset
method is set to Phase-Z sig-
nal + software reset.
--- When power is
turned ON

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