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Omron CJ1W-DRM21 - Master Status 2

Omron CJ1W-DRM21
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3 Data Exchange with the CPU Unit
3-38
CJ-series DeviceNet Units Operation Manual for NJ-series CPU Unit(W497)
The following device variables for CJ-series Unit indicate the status of master I/O allocations.
Information of MstrIOAlocSta (Master I/O Allocation Status) can be referenced from *_Mstr2Sta (Master
Status 2).
z Master I/O Allocation Status Codes and Allocation Statuses
3-2-8 Master Status 2
Code Details
16#00 Unit starting up
16#01 Fixed allocation status 1 (with the scan list disabled)
16#02 Fixed allocation status 2 (with the scan list disabled)
16#03 Fixed allocation status 3 (with the scan list disabled)
16#11 Fixed allocation status 1
16#12 Fixed allocation status 2
16#13 Fixed allocation status 3
16#20 User-set allocations set with device variable for CJ-series Unit
16#30 User-set allocations set by CX-Integrator
16#80 Master function disabled
Name of device variable for
CJ-series Unit
Type R/W Area Function
*_ Mstr2Sta WORD R Master Sta-
tus 2
Bits 00 to 07: Reserved by system
Bits 08 to 15: Master I/O Allocation Status
Default: 16#0000
Name of device variable for
CJ-series Unit
Type R/W Area Function
*_ MstrIOAlocSta BYTE R Master I/O
Allocation
Status
Master I/O Allocation Status
Data range: 16#00 to 03, 16#11 to 13,
16#20, 16#30, 16#80
Default: 16#00

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