Pin No. Pin Name I/O Description
- Vcc - Power supply (*3)
155 XTAL O Clock oscillator terminal
156 EXTAL I External clock/crystal oscillator terminal
157 STATUS0/PTJ[6] O/I/O Processor status
158 STATUS0/PTJ[7] O/I/O Processor status
159 TCLK/PTH[7] I/O Clock I/O for TMU or RTC/I/O port J
160 IRQOUT O Interrupt request notification
161 VssQ - Power for I/O (0V)
162 CKIO I/O System clock I/O
163 VccQ - Power for I/O (3.3V)
164 TxD0/SCPT[0] O Transmission data 0/output port for SCI
165 SCK0/SCPT[1] I/O Serial clock 0/output port for SCI
166 TxD1/SCPT[2] O Transmission data 1/output port for SCI
167 SCK1/SCPT[3] I/O Serial clock 1/output port for SCI
168 TxD2/SCPT[4] O Transmission data 2/output port for SCI
169 SCK2/SCPT[5] I/O Serial clock 2/output port for SCI
170 RTS0/SCPT[6] O/I/O
171 RxD0/SCPT[0] I Transmission data 0/input port for SCI
172 RxD1/SCPT[2] I Transmission data 1/input port for SCI
173 Vss - Power supply (0V)
- Vss - Power supply (0V)
174 RxD2/SCPT[4] I Transmission data 2/input port for SCI
175 Vcc - Power supply (*3)
- Vcc - Power supply (*3)
176 CTS2/IRQ5/SCPT[7] I Transmission clear 2/external interrupt request /I/O port for SCI
177 MCS[7]/PTC[7]/PINT[7
]
O/I/O Mask ROM chip select/I/O port C/port interruption
178 MCS[6]/PTC[6]/PINT[6
]
O/I/O Mask ROM chip select/I/O port C/port interruption
179 MCS[5]/PTC[5]/PINT[5
]
O/I/O Mask ROM chip select/I/O port C/port interruption
180 MCS[4]/PTC[4]/PINT[4
]
O/I/O Mask ROM chip select/I/O port C/port interruption
181 VssQ - Power for I/O (0V)
182 WAKEUP/PTD[3] O/I/O Interrupt request notification on standby mode/I/O port D
183 VccQ - Power for I/O (3.3V)
184 RESETOUT/PTD[2] O/I/O Reset output/I/O port D
185 MCS[3]/PTC[3]/PINT[3
]
O/I/O/I Mask ROM chip select/I/O port C/port interruption
186 MCS[2]/PTC[2]/PINT[2
]
O/I/O/I Mask ROM chip select/I/O port C/port interruption
187 MCS[1]/PTC[1]/PINT[1
]
O/I/O/I Mask ROM chip select/I/O port C/port interruption
188 MCS[0]/PTC[0]/PINT[0
]
O/I/O/I Mask ROM chip select/I/O port C/port interruption
189 DRAK0/PTD[1] O/I/O DMA request accepting/I/O port D
190 DRAK1/PTD[0] O/I/O DMA request accepting/I/O port D
191 DREQ0/PTD[4] I DMA request/input port D
192 DREQ1/PTD[0] I DMA request/input port D
193 RESETP I Power on reset request
194 CA I Chip active (hardware standby request signal)
195 MD3 I Bus width setting for area 0
196 MD4 I Bus width setting for area 1
197 MD5 I Endian setting
198 Avss - Power for analog (0V)
199 AN[0]/PTL[0] I AD converter input/input port L
200 AN[1]/PTL[1] I AD converter input/input port L
201 AN[2]/PTL[2] I AD converter input/input port L
202 AN[3]/PTL[3] I AD converter input/input port L
203 AN[4]/PTL[4] I AD converter input/input port L
204 AN[5]/PTL[5] I AD converter input/input port L
205 Avcc - Power for analog (3.3V)
206 AN[6]/DA[1]/PTL[6] I AD converter input/DA converter output/input port L
207 AN[7]/DA[0]/PTL[7] I AD converter input/DA converter output/input port L
208 AVss - Power for analog (0V)
67
KX-TDA200BX