21 CPU DATA (HANDSET)
21.1. IC1 (BBIC)
Pin No Description I/O Connection at Normal mode at Reset mode
1 INTln/P1[1] D,I ROW1 I I-PU
2 VDDIO - - - -
3 VDD - - - -
4 VSS - - - -
5 LED1/PWM0/P2[0] D,O PWM0 O-L I-PU
6 LED2/PWM1/P2[1] D,O LCD_CSB O-H I-PU
7 LED3 A,I LED_BKL I I
8 LED_BIAS/P3[6]/PD A.O LED_BIAS O I-PD
9 SDA1/P2[5] D,I/O LCD_SI I/O I
10 SCL1/P2[4] D,O LCD_SCL O I
11 INT5n/VDDE/P1[5] D,O LCD_RS O-L I-PU
12 INT2n/P1[2] D,I ROW2 I I-PU
13 AVD - - - -
14 AVS - - - -
15 CAP A,I CAP I I
16 Xta11 A,I XtaI1 I -
17 VSSRF - - - -
18 RFCLKp A,O NC O Hi-Z
19 RSSI/RFCLKm A,I RSSI I Hi-Z
20 VDDRF - - - -
21 RFCLKd D,O RFCLKd O O-L
22 TDD A,O TDO O -
23 RDI D,I RDI I I
24 SK D,I/O SK - O-L
25 PD1/SIO D,I/O SIO - I-PD
26 LE D,I/O LE O-L O-H
27 P3[1]/PD1 D,I/O COL1 O-L I-PD
28 P3[2]/PD2 D,I/O COL2 O-L I-PD
29 VSSPA - - - -
30 PAOUTm D,O PAOUTm O O
31 VDDPA - - - -
32 PAOUTp D,O PAOUTp O O
33 VSSPA - - - -
34 P3[3]/PD3 D,I/O COL3 O-L I-PD
35 P3[4]/PD4 D,I/O COL4 O-L I-PD
36 TDOD/P3[5]/PD5 D,I/O COL5 O-L I-PD
37 VSS - - - -
38 VDDIO - - - -
39 VDD - - - -
40 PCM_FSC/INT0n/P1[0] D,I ROW0 I I-PU
41 P0[0]/UTX D,I/O UTX O I-PU
42 P0[1]/URX D,I/O URX O I-PU
43 P0[2]/JTIO D,I/O JTIO O I-PU
44 P0[3]/SDA2 D,I/O P0[3] O I-PU
45 P0[4]/SCL2 D,I/O P0[4] O I-PU
46 P0[5]/SPICLK/PCM D,I/O SP_LED O I-PU
47 P0[6]/SPIDO/PCM_D D,O CD_AMP O I-PU
48 P0[7]/SPIDI/PCM_D D,I/O RESET O I-PU
49 VSS - - - -
50 VDD - - - -
51 P2[3]/ADC1 O EEP_WP O O
52 P1[7]/CHARGE/INT7 I CHARGE I I-PD
53 RSTn I RSTn I I-PU
54 DC_stab O DC_stab O O
55 DC_1 I DC_I I I
56 DC_CTRL O DC_CTRL O O-PD
57 DC_Sence I DC_Sence I I
58 VBAT1 A,I VBAT1 I I
59 LDO1_CTRL D,O LDO1_CTRL O O-H
60 LDO2_CTRL D,O LDO2_CTRL O O-H
61 P1[6]/PON/INT6 I power_det I I-PD
62 P2[6]/stop_charge A,O stop_charge O O-O
56
KX-TG1283JXS / KX-TG1283JXT / KX-TCA122CXS / KX-TCA122CXT / KX-TCA121CXS / KX-TCA121CXT
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