Panasonic TH-42PZ77U - DG-Board (1 of 4) Block Diagram

15.13. DG-Board (1 of 4) Block Diagram
VI1VSYNC
VI1HSYNC
VI1ENB
VI1CKOUT
VI1CLK
RF_AFT
RF_V
FAT_N
FAT_P
RF_L
RF_R
FE_XRST
FE_IRQ
CHOPSYNC
CHOVAL
CHODATA
CHOCLK
MAIN_Y
SOY
MAIN_PB
MAIN_PR
HDMI_SPDIF
HDMI_BCLK
HDMI_SDIN
HDMI_LRCK
SOY
MAIN_PR
MAIN_PB
MAIN_Y
CLK+
CLK+
D1-
HDMI_5V_DET3
D1-
D0-
D1+
D2+
D2-
EDID_WP
HPD1
D0+
D1+
HPD3
D2+
D2-
CLK-
CLK-
D0+
HDMI_5V_DET1
D0-
XIRQ3
7493_XRST
HDMI_INT2
TV_MAIN_ON_DELAY
HDMI_CEC
D2+
D2-
D1+
CLK-
CLK+
D0-
D0+
D1-
CLK-
CLK+
D0-
D0+
D1-
D1+
D2-
D2+
D4524
D4527
D4525
JK4500
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
SUB5V
D4526
SUB5V
Q4500
Q4502
Q4503
JK4501
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Q4501
Q4505
Q4504
INTERFACE
TMDS DECODER
LRCLK
AUDI O
RXA_0N
I2SO
VIDEO
Y0-Y9
SDA
SDA1
INTERFACE
RXA_0P
SCL
HDCP
RXA_CP
RECEIVER
SCL1
TMDS DATA
AND
SCLK
RXA_CN
RXA_2P
RXA_2N
SPDIF
UV0-UV9
CIPHER DECRYPTOR
RXA_1N
RXA_1P
2
8
3
7
12 11
DE
HS
VS
51
16
48
17
LLC
DCLKIN
HDMI I/F RECEIVER
IC4510
CVDD 1.8V
IC4508
VIN
5
CONT
VOUT
1
8
DVDD 1.8V
8
IC4509
1
CONT
5
VIN
VOUT
SUB3.3V
AVR 3.3V
7
IC4506
1
CONT
5
VIN
VOUT
MDA
108 107
MCL
SDA
EEPROM
6
7
SCL
IC4504
VCC
8
WC
5
SUB3.3V
10bit A/D
BTL
IF_AGC
BB
L_OUT
V_SUPPLY
IFD_OUT1
VIDEO_OUT
17
4
14
SCL
16
TUNER
1
18
5
R_OUT
12
20
19
11
AFT
BV
9
TU8300
13
BT30V
SUB5V
SDA
IFD_OUT2
Q8302
Q8303
Q8301
44
INT
IBMSDA
32
43
NRST
56
IBAINP
34
IBAINN
C8327-C8331
C8333,C8334
L8306,07,09
IBAGCIF
49
93
IBPCK
IBDEN
94
95
IBD06
98
IBD07
117
SCL
SDA
118
106
IBMSCL
XO
X8300
XI
25
24
SCL2
SDA2
BAND FILTER
114
TMS
113
TCK
TRST
111
109
TDI
108
TDO
JTAG
(FE_TO_PEAKS)
(SPC_TO_FE)
SWITCH
38
45
55
58
33
24
46
47
52
TMDS DECODER
CIPHER DECRYPTOR
HDCP
RECEIVER
TMDS DATA
AND
TVDDAVDD
SUB5V
DVDD PVDDCVDD
10bit
A/D
DETECT
DEM
CHROMA
COLOR
10bit
A/D
10bit
A/D
78
AIN6
94
99
AIN8
AIN4
97
18
53
MATRIX
RGB
YUV
3D/2D
VPK
COM
Q4516
Q4515
Q4514
Q4517
LPF
LPF
LPF
(RX_SCK)
(RX_SD0)
(RX_WS)
R0-R3
RXB_0N
RXB_1P
RXB_2P
RXB_CP
RXB_1N
RXB_CN
RXB_2N
RXB_0P
IC8302
(TERRESTRIAL RECEIVER)
FRONT END PROCESSOR
SUB3.3V
DVDDIO
DG
DIGITAL SIGNAL PROCESSOR
MICOM
HDMI INTERFACE
112
132
7
D0G
CEC
D0G
D2-
CLK+
129
VCC
8
SCL
DDCG
122
HPDT
+5V
HPDT
SCL
DDCG
DDC_SCL1
CLK+
CLK-
121
N.C.
SCL
HDMI1
128
VCC
5
D2+
HDMI2
INV.
8
D1G
CLKG
WC
WC
119
D1+
HDMI2 +5V DET
D2+
N.C.
HDMI1 RESET
SCL
D0-
D2-
118
HDMI2 RESET
D0+
131
HDMI1 +5V DET
EEPROM
EDID2
6
CEC
7
DDC_SDA1
D1G
5
116
138
+5V
SDA
D1-
SDA
EEPROM
EDID1
137
D0-
CLKG
IC4500
D1-
115
IC4501
DDC_SCL0
D2G
SDA
135
D0+
SDA
DDC_SDA0
CLK-
113
134
6
D1+
D2G
INT1
21
19
INT2
20
RESET
X4500
XTAL1
XTAL
6566
DDCA_SDA
106
1
144
DDCB_SCL
DDCB_SDA
DDCA_SCL
105
INV.
SOY
SUB3.3V
VDDH
VDDA
VDDL
SUB1.2V
1
2
3
4
FULL HD
62
HS_IN
63
VS_IN
TH-42PZ77U
DG-Board (1 of 4) Block Diagram
TH-42PZ77U
DG-Board (1 of 4) Block Diagram
TH-42PZ77U
77