Philips 32PFL5605D/78 - Page 32

Circuit Descriptions
EN 32 LC9.3L LA7.
2010-Mar-26
Figure 7-4 Power architecture
7.3 Front-end
Refer to Figure 7-5 for the front-end architecture.
Figure 7-5 Front-end architecture
Below find an explanation of the signals that are used:
• RF_SW: switching signal between cable and antenna:
- 0 V: antenna
- 3V3: cable
• GAIN_SW: Low-Noise Amplifier (LNA)
- “On”: antenna
- “Off”: cable
• AFT: Frequency Fine Tuning; for analog use only
• SIF_OUT: audio for analog channel
• VIDEO_OUT: video for analog channel
• SYRSTN: reset for tuner
• SDA/SCL: communication between tuner and MT5392
• SBYTE: transport stream for digital channel inputs
• SPBVAL: transport stream for digital channel inputs
• SRDT: transport stream for digital channel inputs
• SRCK: transport stream for digital channel inputs.
18970_203_100325.eps
100325
DCDC
3.34 V +/−0.16 V
MT5392
EEPROM
Flash
NVM
HDMI MUX
1.05 V +/−0.05 V
1.83 V +/−0.05 V
5.0 V
+/−0.25 V
Tuner Circuitry
USB2.0
GDDR3 × 2
1.25 V +/-0.06 V
V
S
= +12 V
Regulator
8.0 V +/−0.40 V
Regulator
5.25 V +/−0.26 V
Regulator
coil
5.20 V
+/−0.26 V
2.50 V
+/−0.12 V
Regulator
DCDC
18970_204_100325.eps
100325
VA1G5BF8010
RF_SW
GAIN_SW
BB(5 V)
B1(5 V)
AFT
SIF_OUT
VIDEO_OUT
B2(2.5 V)
B3(3.3 V)
B4(1.2 V)
SYRSTN
SDA
SCL
RSEORF
SBYTE
SPBVAL
SRDT
SRCK
+2V5_SW
+3V3_SW
+1V2_SW
+5 V TUN_DIGITAL
MT5392
GPIO
ADIN
AUDIO IN
VIDEO IN
Transistor
Buffer
I
2
C
I
2
C
Transport
stream
Input
Transport Stream
MT5392