Philips 37PF9631D/37 - Block Diagram Video

Block Diagrams, Test Point Overviews, and Waveforms
EN 33EJ2.0U LA 6.
Block Diagram Video
B07C
ANALOG I/O
B07B
HDMI: I/O + CONTROL
B07A
HDMI +SUPPLY
B02B
MAIN TUNER
VIDEO
B02A
CHANNNEL DECODER
B03
MPIF MAIN:
D
SIDE I/O
B04G
VIPER/PNX 2015:
DISPLAY INTERFACE
B04
PNX 2015:
B05
VIPER:
B05B
VIPER: MAIN MEMORY
B06
DISPLAY INTERFACE: MOP
B04E
PNX 2015: STANDBY
& CONTROL
MP-G(0-7)MP-GOUT(0-9)
MP-R(0-7)MP-ROUT(0-9)
A
D
A
D
A
D
U
V
P
M
A
LC
A
D
+
CVBS-IF
123
CVBS1
126
CVBS2
1
CVBS_DTV
12
CVBS|Y34
C3
5
CVBS|Y4
8
C4
9
Y_COMB
15
C_COMB
16
R|PR|V_1
25
G|Y|Y_1
26
B|PB|U_1
27
R|PR|V_2
30
G|Y|Y_2
31
B|PB|U_2
32
YUV
RGB
CLAMP
LEVEL
ADAPT
INV.
PA L
DATA
LINK
3
DATA
LINK
2
STROBE1N
60
STROBE1P
61
DATA1N
62
DATA1P
63
50
51
52
53
55
56
57
123
2nd
SIF
A/D
CVBS-OUTB
CVBS SEC
LPF
LPF
CVBS-OUTA
Yyuv
2FH
C-PRIM
CVBS/Y RIM
Yyuv
2
7
8
1A10
SIFINP
SIFINN
VIFINP
VIFINN
CVBSOUTIF-MAIN
AV1_CVBS
AV2_Y-CVBS
AV2_C
FRONT_Y-CVBS
FRONT_C
AV7_Y-CVBS
R4
R3
R2
R1
P4
P3
P2
P1
N4
N3
N2
N1
AVP1_DLK1SN
AVP1_DLK1SP
AVP1_DLK1DN
AVP1_DLK1DP
AVP1_DLK3SN
AVP1_DLK3SP
AVP1_DLK3DN
AVP1_DLK3DP
AVP1_DLK2SN
AVP1_DLK2SP
AVP1_DLK2DN
AVP1_DLK2DP
STROBE3N
STROBE3P
DATA3N
DATA3P
STROBE2N
STROBE2P
DATA2N
DATA2P
7J00
PNX2015E
B07C
B07C
B07C
99
100
107
108
EF
7A11
120
N.C.
MPIF
+5V
14
28
35
SUPPLY
44
SDA-DMA
43
SCL-DMA
DIGITAL
BLOCK
Yyuv
2Fh
U,V
MONO SEC.
TIMING
CIRCUIT
46
M3
CLK-MPIF
40
M4
HV-PRM-MAIN
CLP PRIM
CLP SEC
CLP yuv
SOUND
BPF
LPF
LPF
TRAP
GROUP
DELAY
QSS
QSSOUT
AUDIO SWITCH
TO AM INTERNAL
LPF
CVBSOUTIF
IF
SOURCE SELECTION
7A00
PNX3000HL
DATA
LINK
1
19
22
N.C.
N.C.
G_15940_036.eps
220506
3A17
4
5
STROBE1N-MAIN
STROBE1P-MAIN
DATA1N-MAIN
DATA1P-MAIN
STROBE3N-MAIN
STROBE3P-MAIN
DATA3N-MAIN
DATA3P-MAIN
STROBE2N-MAIN
STROBE2P-MAIN
DATA2N-MAIN
DATA2P-MAIN
AVP1_HVINFO1
MPIF_CLK
DATA LINK 1
DATA LINK 3
DATA LINK 2
7B50
TDA9975HS
19
1
18 2
1
1I06
3
4
7
9
10
12
15
6
16
19
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
ARX-DCC-SCL
ARX-DCC-SDA
ARX-HOTPLUG
HDMI
CONNECTOR
1B02
HDMI
RX2+A
RX2-A
RX1+A
RX1-A
RX0+A
RX0-A
RXC+A
RXC-1
RX2+B
RX2-B
RX1+B
RX2-B
RX0+B
RX0-B
RXC+B
RXC-B
SDA-MM
SCL-MM
DV4-DATA(0-7)
DV5-DATA(0-7)
DV4-CLK
DV-HREF
DV-VREF
DV-FREF
2
1
201
207
142
143
HSCL B
HSDA B
H-SYNC-VGA
V-SYNC-VGA
Y
Y1
PR
PR1
Y
Y1
PB
PB1
DV4_DATA_0 T0 9
DV5_DATA_0 T0 9
DV3F-DATA (0-7)
7V00
PNX8550
DV-ROU T
DV-GOUT
DV-BOUT
7G00
XC3S200-4TQG144C
TUN-VIPER-RX-DATA
AUDIO/VIDEO
TUNNELBUS
PMX-MA
7L50
K4D261638F
PNX-MDATA
PNX-MCLK-P
PNX-MCLK-N
12
13
15
16
1G50
18
5J54
TXPNXC-
TXPNXC+
TXPNXCLK-
TXPNXCLK+
TXPNXD-
TXPNXD+
TXPNXE-
TXPNXE+
5J56
5J58
5J60
TXPNXA+
TXPNXB-
TXPNXB+
5J50
5J52
TXPNXA-
MP-B(0-7)MP-BOUT(0-9)
HSYNC
VSYNC
G/Y
R/PR
G/Y
B/PB
PNX2015
VIPER
DDR
SDRAM
128Mx16
N.C.
N.C.
B07A
B07A
B07A
B07A
B07A
B07A
B07A
B07A
TUN-VIPER-TX-DATA
DV I/O INTERFACE
19
21
22
24
25
27
28
DDR INTERFACE
MP-CLKOUT
MP-OUT-FFIELD
MP-OUT-HS
MP-OUT-VS
MP-OUT-DE
60
55
56
J29
J28
J30
J27
K26
DV2A-CLK
DV3F-CLK
7V01
K4D551638F
DDR
SDRAM 1
8Mx16
7V02
K4D551638F
DDR
SDRAM 2
8Mx16
MM_DATA
MM_A(0-12)
MAIN MEMORY
Video
output
formatter
VHREF
timing
generator
Termination
resistance
control
HDMI
receiver
ADC
Slicers
Activity
detection &
sync selec.
Sync
seperator
Clocks
generator
HDCP
Derepeater
Upsample
Line time
measuremebt
I2C slave
interface
LVDS_AN
LVDS_AP
LVDS_BN
LVDS_BP
LVDS_CN
LVDS_CP
LVDS_CLKN
LVDS_CLKP
LVDS_DN
LVDS_DP
LVDS_EN
LVDS_EP
B26
C26
A25
B25
D25
E25
C23
D23
B24
C24
E24
F24
45
46
MCLK_P
MCLK_N
A17
A16
DV-HREF
DV-VREF
DV-FREF
AH9
AJ9
AK9
DV2_CLK
DV3_CLK
AF30
AK28
RGB_HSYNC
RGB_VSYNC
RGB_CLK_IN
RGB_UD
RGB_DE
RIN (0-9)
GIN (0-9)
BIN (0-9)
DV1_DATA(0-9)
DV2_DATA(0-9)
DV3_DATA(0-9)
AUDIO/VIDEO
AV6_VSYNC
G2
AVP2_VSYNC2
AV2_FBL
L2
AVP2_HSYNCFBL2
N.C.
N.C.
B03A
AVIP-1
AVIP-2
COLUMBUS
3D Comb
filter and
noice
reduction
LVDS_TX
1SD+1HD
YUV
Video in
Memory
based scaler
VO-1
Video MPEG
decoder
VIP
South tunnel
North tunnel
Memory
controller
LV DS
CONNECTOR
TO SCREEN
PMX-MA(0-12)
PNX-MDATA
(0-15)
Memory
controller
5 Layer
primary
video out
HD/VGA/
656
Video
TS
router
Tunnel
Dual
con
acces
Temporal
noise redux
Scaler and
de-interlacer
250Mhz
MIPS32
CPU
DVD
CSS
Dual SD
single HD
MPE2 decoder
2D DE
2-Layer
secondary
video out
VO-2
1
VDISP
2
3
4
7B20
HPD-HIRATE
B05A
AK8
STANDBY
PROCESSOR
See
Block digram
Control
7LA7
M25P05
512K
FLASH
SPI-SDO
SPI-CLK
SPI-CSB
SPI-WP
5
6
1
3
STANDBY
B4E
131
128
90
88
96
94
81
79
68
66
1I04
Y1
PB1
PR1
PB
PR
Y
1
5
S VIDEO
2
4
3
1I01
1I00
AV2_C
AV2_Y-CVBS
VIDEO
AV7_Y-CVBS
1I03
Y
PB
PR
AV1_CVBS
VIDEO
IN
PB
PR
Y
VIDEO
IN
AV1
AV2
AV3
B07b
B07b
B07b
B07b
B07b
B07b
B03a
B03a
B03a
B03a
180
179
174
173
168
167
162
161
1T04
TD1336O/FGHP
MAIN HYBRID
TUNER
12
1
7
8
1T01
14
7T13
LA7795T-E
AGC COTROL
AUX-IF-AGC
2
3
14
15
7
6
out
in
FAT-IF-AGC-MAIN
34
4
13
FAT-ADC-INN
FAT-ADC-INP
8
7
7T22
NXT2004
IF-ANA
38
DV1F-DATA(0-7)
ADC
QAM 8VSB
Demodulator
ADC
QPSK
Demodulator
Micro-
Controller
GPIO
FEC
ADC
MPEG_DATA
DTV CABLE AND
TERRESTRIAL
RECEIVER
SAW 44MHz
IF-OUT
IF-1
IF-2
FM-TRAP
48
2
4
1M36
1M36
2
4
1
5
S VIDEO
2
4
3
1001
1002
VIDEO
Y-CVBS
C
DV1F-DATA(0-7)
TO
VIPER
B05C
IRQ-FE-MAIN
84
B05A
IF-AGC
FM-T
7T12
IF-ANA
B03C
B03B
SUPPLY
B04A
B04B
From
CHANNEL
DECODER
B02A
B05C
B05C B05B
TUNNELBUS
B04C
TUN-VIPER-TX-CLKN
TUN-VIPER-TX-CLKP
TUN-VIPER-RX-CLKP
B04D
AK10
AH10
AG10
AJ27
Termination
resistance
control
CLAMP
MUX
30
31
SCL-I2C4
SDA-I2C4
1T11
25M14
29
30
1H00
27M
C4
A2
1LA0
16M
AJ12
AH12
MOP
PICTURE ENHANCEMENT
MP-CLK
MP-FF
MP-HS
MP-VS
MP-DE
59
57
B05A
CONTROL
AH19
AG25