Pioneer PDP-436SXE - Page 143

PDP-436SXE
143
5678
56
7
8
C
D
F
A
B
E
P53/BCLK
P52/*RD
P51/*WRH/*BHE
P50/*WRL/*WR
P47/*CS3
P46/*CS2
P45/*CS1
P44/*CS0
P43/A19
P42/A18
P41/A17
P40/A16
P37/A15
P36/A14
P35/A13
P34/A12
P33/A11
P32/A10
P31/A9
VCC2
P30/A8(/-/D7)
VSS
P27/AN27/A7(/D7/D6)
P26/AN26/A6(/D6/D5)
P25/AN25/A5(/D5/D4)
P24/AN24/A4(/D4/D3)
P23/AN23/A3(/D3/D2)
P22/AN22/A2(/D2/D1)
P21/AN21/A1(/D1/D0)
P20/AN20/A0/(/D0/-)
P17/D15/*INT5
P16/D14/*INT4
P15/D13/*INT3
P14/D12
P13/D11
P12/D10
P11/D9
P10/D8
P07/AN17/D7
P06/AN16/D6
P05/AN15/D5
P04/AN14/D4
P03/AN13/D3
P02/AN12/D2
P01/AN11/D1
RELAY
CE
PSIZE
SCL
SDA
PD_MUTE_B
H_DET_B
RST_SQ
CE_SQ
BUSY_SQ
FUT1_SQ
FUT2_SQ
WE_SQ
VCC2
PD_TRG
VSS
SCAN_PD
YDRV_PD
YSUS_PD
YDCDC_PD
SCN5V_PD
XSUS_PD
XDCDC_PD
XDRV_PD
A_MUTE
A_NG
PSW2
STB_SW
ADRS_PD
DDC_PD
PS_PD
Power ON control output
Terminal for FLASH re-writing mode setting
Panel size discrimination
IIC clock output
IIC data in/out
Muting the power-down output to power Assy
H existence discrimination
Forced reset of ASTRA (100ms after releasing RST2)
Enable for ASTRA communication
BUSY input for ASTRA communication
Communication reseive to ASTRA
Communication reseive to ASTRA
Communication path selection control when rewriting ASTRA
Vcc-STB 3.3V
PD detection
GND
PD for SCAN reduced voltage
Y drive PD signal
Y-SUSPD signal
Y drive DCDC converter PD signal
PD for SCAN 5V reduced voltage
X drive PD signal
X drive DCDC converter PD signal
X drive PD signal
Audio mute
Audio NG detection
Various power output mute at function STB
Stand-by setting of Audio AMP
Adress PD
DC-DC converter PD signal
PD signal inside Power Assy
O
O
O
I
I
O
I/O
O
I
O
O
O
I
O
O
O
O
-
I
-
I
I
I
I
I
I
I
I
O
I
I
O
I
O
O
I
I
I
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
H
H:43
H
H
L
L
L
L
H
H
-
L
-
H
H
H
H
H
H
H
H
H
L
H
L
H
H
H
No. Pin Name Signal Name I/O Function Active