5G Module Series
RM510Q-GL Hardware Design
RM510Q-GL_Hardware_Design 31 / 88
Host Module
FULL_CARD_POWER_OFF#
PMIC
GPIO
6
1.8 V or 3.3 V
Note: The voltage of pin 6 should be no less than 1.19V when it is at HIGH level.
R4
100k
Figure 8: Turn on the Module with a Host GPIO
The timing of turn-on scenario is illustrated in the following figure.
VCC
RESET#
20 s
Module power-on or insertion detection
USIM_VDD
Module Status
FCPO#
RFFE_VIO_1V8
68 ms
System turn-on and booting
V
IH
≥ 1.19 V
1.8 V or 3.0 V
System bootingInactive Active
T
power-on
T
turn-on
T
booting
T
registering
1.5 V
3.7 V
1.8 V
Figure 9: Turn-on Timing through FULL_CARD_POWER_OFF#
Table 9: Turn-on Time of the Module
System power-on time.
It depends on host device.
Network registering time related to network CSQ.