Quectel RM520N-GL - Pin Definition of Pcie

5G Module Series
RM520N-GL_Hardware_Design 47 / 84
Parameter
1. The underlined value is the default parameter value.
2. For more details about the command, see document [3].
4.3.2. Pin Definition of PCIe
The following table shows the pin definition of PCIe interface.
Table 17: Pin Definition of PCIe Interface
If the optional parameter is specified, set PCIe RC/EP mode:
OK
If there is any error:
ERROR
Maximum Response Time
300 ms
Characteristics
The command takes effect after the module is restarted.
The configuration will be saved automatically.
<mode> Integer type. Set PCIe RC or EP mode.
0 PCIe EP mode.
1 PCIe RC mode.
Pin No.
Pin Name
I/O
Description
Comment
55
PCIE_REFCLK_P
AIO
PCIe reference clock (+)
100 MHz.
Require differential impedance
of 85 Ω
53
PCIE_REFCLK_M
AIO
PCIe reference clock (-)
49
PCIE_RX_P
AI
PCIe receive (+)
Require differential impedance
of 85 Ω
47
PCIE_RX_M
AI
PCIe receive (-)
43
PCIE_TX_P
AO
PCIe transmit (+)
Require differential impedance
NOTE