Quectel RM520N-GL - Configuration Pins

5G Module Series
RM520N-GL_Hardware_Design 55 / 84
4.7. Configuration Pins
The module provides four configuration pins, which are defined as below.
Table 27: Configuration Pins List of M.2 Specification
Table 28: Configuration Pins of the Module
The following figure shows a reference circuit of these four pins.
Host Module
CONFIG_0
CONFIG_1
CONFIG_2
CONFIG_3
GPIO
GPIO
GPIO
GPIO
21
69
75
1
VCC_IO_HOST
R1
10k
R2
10k
R3
10k
R4
10k
NM-0Ω
NM-0Ω
NM-0Ω
0Ω
NOTE: The voltage level of VCC_IO_HOST depends on the host side and could be 1.8 V or 3.3 V.
Figure 24: Recommended Circuit of Configuration Pins
CONFIG_0
(Pin 21)
CONFIG_1
(Pin 69)
CONFIG_2
(Pin 75)
CONFIG_3
(Pin 1)
Module Type and
Main Host Interface
Port
Configuration
NC
GND
NC
NC
Quectel defined
2
Pin No.
Pin Name
I/O
Description
21
CONFIG_0
DO
Not connected internally
69
CONFIG_1
DO
Connected to GND internally
75
CONFIG_2
DO
Not connected internally
1
CONFIG_3
DO
Not connected internally