Instruction Reference Manual 111
Description
Resets bit b (anyofthebits0,1,2,3,4,5,6,or7)ofthedataheldinr (anyoftheregisterA,B,C,D,E,H,or
L).
The bit is reset by performing a logical AND between the selected bit and its complement.
RES b,r
Opcode Instruction Clocks Operation
b,r A B C D E H L RES b,r 4 (2,2) r =
r &~bit
CB(0) 87 80 81 82 83 84 85
CB(1) 8F 88 89 8A 8B 8C 8D
CB(2) 97 90 91 92 93 94 95
CB(3) 9F 98 99 9A 9B 9C 9D
CB(4) A7 A0 A1 A2 A3 A4 A5
CB(5) AF A8 A9 AA AB AC AD
CB(6) B7 B0 B1 B2 B3 B4 B5
CB(7) BF B8 B9 BA BB BC BD
Flags ALTD I/O
S Z L/V C F R SP S D
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