138 Rabbit 2000/3000 Microprocessor
Description
Arithmetically shifts to the left the bits of the data whose address is
• the data in HL, or
• the sum of the data in IX and a displacement d,or
• the sum of the data in IY and a displacement d.
Bits 0 through 6 are each shifted to the next highest-order bit position (bit 0 moves to bit 1, etc.). Bit 7 is
shifted to the C flag. Bit 0 is reset. See figure below.
Figure 7: The bit logic of the SLA instruction.
SLA (HL)
SLA (IX+d)
SLA (IY+d)
Opcode Instruction Clocks Operation
CB 26 SLA (HL) 10* (HL) = {(HL)[6,0],0}; CF = (HL)[7]
DD CB d 26 SLA (IX+d) 13** (IX + d)={(IX+d)[6,0],0};
CF = (IX + d)[7]
FD CB d 26 SLA (IY+d) 13** (IY + d)={(IY+d)[6,0],0};
CF = (IY + d)[7]
Clocking: *10 (2,2,1,2,3) **13 (2,2,2,2,2,3)
Flags ALTD I/O
S Z L/V C F R SP S D
• • L • • • •
7
0
CF
0