Sequential PROPHET-600 - 7-4 MIXER; 7-5 FILTER

2-7 MIDI
For programming information see "The Complete SCI MIDI."
U323 MIDI UART allows two microcomputers to communicate keyboard and program
information. As the keyboard is played this data is converted to the MIDI protocol and
sent to the UART one byte at a time, for transmission to any receiver which may be
connected. The MIDI standard hardware is a 5-mA current loop, designed especially to
prevent the formation of audio ground loops which can develop in complex systems.
The UART converts parallel bytes written to its memory-mapped transmit register
into serially-formatted bytes consisting of a start bit, 8 data bits (DO to D7), and a
stop bit. The transmission occurs at 31.25 kBaud, which is obtained by internally
dividing the 500 kHz TxC (and RxC) input by 16. Transmitter data out is buffered by
U311-8. which can sink up to 16 mA. If transmit data is low, current flows from *5V
through R313, over pin 4 of both connectors, through R315 and optisolator LED U317,
and returns over connector pins 5. The output of the optoisolator is normally pulled
high by R333. But with the LED on, the isolater switch turns on, sending a low to the
UART reeiver input. Notice that while the MIDI OUT jack is grounded to the chassis,
MIDI IN is not. This allows the cables to provide their shielding services without
creating ground loops.
When the UART has not received data, its pin 7 -IREQ is high. Each 500 kHz clock
pulse on NMI FF U319-3 clocks this signal, -NMI false, through U319-5 to the CPU,
where it has no effect. But when a complete serial byte is received, -IREQ goes low,
indicating the receive register is holding data. This data needs to be retrieved, so that
the next byte of data can be received. -NMI is now true and it will take at most 2 us to
be clocked through the NMI FF. When it sees the negative edge on its pin 17, the CPU
completes its current instruction, makes a note to itself where it was in the program,
then branches to the routine which handies the UART input.
When the data is handled, the CPU will prepare for the next MIDI interrupt by clearing
the NMI FF with the -NMI CLR pulse from U326 MISC LATCH (pin 10). Whenever the
CPU is unable to respond to the MIDI, for example, when tuning, it inhibits the NMI FF
with this bit.
2-8 LED MATRIX
The LED matrix is driven by data latched by strobes ♦ CSOO and -CSOl (Chip Select
Output) which are produced by U322 Output Port Decoder.
Because the LEDs are strobed at the constant 5-ms interrupt rate, they don't flicker.
Please see schematic sheet A (SD600-1). There are three multiplexed LED columns.
Two columns each contain the segments of DS101, including the decimal point for Edit
mode indication. The separate LEDs for the mebrane switches fill the rest of the
matrix.
The matrix technique of lighting LEDs is widely used, so we'll just say that bits
representing LEDs to be lit in one row are latched off the data bus by U102 and U103,
when clocked by -CSOI. The latched bits turn on the transistors in array QA101 (plus
Q101). Only the LEDs in the column enabled exclusively by Q102-Q104 will light.
These bits are latched by the -CSOO strobe.
2-10
TM600A 7/83