78
CX-JTD8
Pin No. Pin Name I/O Description
143 AVDD1 — Power supply terminal (+3.3V) (analog PLL)
144 AVSS1 — Ground terminal (analog PLL)
145 VDD — Power supply terminal (+1.8V) (inside core)
146 GND — Ground terminal (inside core)
147 XCK O Audio system clock output
148 LRCK O LRCK signal output for audio
149 BCK O BCK signal output for audio
150 DATA0(DM) O Audio data(Down Mix signal) output
151 DATA1(FLR) O Audio data(Front L/R signal) output
152 VDDP — Power supply terminal (+3.3V) (I/O signal)
153 GNDP — Ground terminal (I/O signal)
154 DATA2(SLR) O Audio data(Rear L/R signal) output
155 DATA3(CSW) O Audio data(Center/Subwoofer signal) output
156 IEC958 O S/PDIF signal (not used)
157 DAI_DATA I Data input from ADC (not used)
158 DAI_BCK I BCK signal input from ADC (not used)
159 DAI_LRCK I LRCK signal input from ADC (not used)
160 I2C_CL I/O I2C clock bus
161 I2C_DA I/O I2C data bus
162 CS(ZIVA_E2P) O Chip select signal output to the EEPROM
163 RXD1 I Serial data input for check jig
164 TXD1 O Serial data output for check jig
165
WRITE_CTRL
(ZIVA_E2P)
OWrite control signal output to the EEPROM
166 GNDP — Ground terminal (I/O signal)
167 VDDP — Power supply terminal (+3.3V) (I/O signal)
168 SDDATA7 I SDBus data7 input
169 SDDATA6 I SDBus data6 input
170 SDDATA5 I SDBus data5 input
171 SDDATA4 I SDBus data4 input
172 GND — Ground terminal (inside core)
173 VDD — Power supply terminal (+1.8V) (inside core)
174 SDDATA3 I SDBus data3 input
175 SDDATA2 I SDBus data2 input
176 SDDATA1 I SDBus data1 input
177 SDDATA0 I SDBus data0 input
178 SDREQ O SDBus data request signal output
179 SDEN I SDBus data enable signal input
180 GNDP — Ground terminal (I/O signal)
181 VDDP — Power supply terminal (+3.3V) (I/O signal)
182 SDERROR I SDBus data error signal input
183 SDCLK I SDBus data clock input
184 HIRQ1 I Interrupt signal input from the mechanism controller
185 DRVCLK I Serial data clock input from the mechanism controller
186 DRVTX I Serial data input from the mechanism controller and the EEPROM
187 DRVRX I Serial data output to the mechanism controller and the EEPROM
188 DRVRDY O Ready signal input from the mechanism controller