Sony HCD-SC8 - Page 86

86
HCD-SC5/SC6/SC8
Pin No. Pin Name I/O Description
53 XHAC I
DVD mode: Serial data request signal input from the DVD system processor
SACD mode: Serial data request signal input from the DSD decoder
54 HINT O
Not used
55 XS16 O
Not used
56 HA1 I
Not used
57 XPDI I/O
Not used
58 VDDS —
Power supply terminal (+5V) (digital system)
59, 60 HA0, HA2 I
Not used
61 VSS —
Ground terminal (digital system)
62, 63 HCS0, HCS1 I
Not used
64 VDD —
Power supply terminal (+3.3V) (digital system)
65 DASP I/O
Not used
66 to 69 MDB0 to MDB3 I/O
Two-way data bus with the D-RAM
70 VSS —
Ground terminal (digital system)
71 MDB4 I/O
Two-way data bus with the D-RAM
72 VDD5V —
Power supply terminal (+5V)
73 to 75 MDB5 to MDB7 I/O
Two-way data bus with the D-RAM
76 XMWR O
Write enable signal output to the D-RAM
77 VDD —
Power supply terminal (+3.3V) (digital system)
78 XRAS O
Row address strobe signal output to the D-RAM
79, 80 MA0, MA1 O
Address signal output to the D-RAM
81 VSS —
Ground terminal (digital system)
82 to 87 MA2 to MA7 O
Address signal output to the D-RAM
88 VDD —
Power supply terminal (+3.3V) (digital system)
89 MA8 O
Address signal output to the D-RAM
90 VSS —
Ground terminal (digital system)
91 MA9 O
Address signal output to the D-RAM
92 MNT1 O
EEPROM ready signal output to the mechanism controller
93 MNT2 O
Operation clock signal output for PSP physical disc mark detection to DSD decoder
94 XMOE O
Output enable signal output to the D-RAM
95 XCAS O
Column address strobe signal output to the D-RAM
96, 97 MDB8, MDB9 I/O
Two-way data bus with the D-RAM
98 VSS —
Ground terminal (digital system)
99 MDBA I/O
Two-way data bus with the D-RAM
100 VDD —
Power supply terminal (+3.3V) (digital system)
101, 102 MDBB, MDBC I/O
Two-way data bus with the D-RAM
103 VDD5V —
Power supply terminal (+5V)
104 to 10
6
MDBD to MDBF I/O
Two-way data bus with the D-RAM
107 GFS O
Guard frame sync signal output to the mechanism controller
108 VSS —
Ground terminal (digital system)
109 APEO O
Absolute phase error signal output
110 VDD —
Power supply terminal (+3.3V) (digital system)
111 DASYO O
RF binary signal output
112 GNDA5 —
Ground terminal (analog system)
113, 114 ASF1, AFS2 —
Filter connected terminal for selection the constant asymmetry compensation
115 DASYI I
Analog signal input after integrated from the RF binary signal