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Sony HCD-V5500 - Page 24

Sony HCD-V5500
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— 62 —
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
I/O
—
I
I
I
I
I
I
I
I
—
I
I
I
I
I
I
I
I
—
I
I
I
I
I
I
I
I
—
I
I
I
O
I
I
I
I
—
I
I
I
—
I
I
I
I
I
I
I
I
—
Description
Ground
[MSB]
B input 0–7 (Connect to ground)
[LSB]
Ground
[MSB]
G (Y) input 0–7
[LSB]
Ground
[MSB]
R (Cb/Cr) input 0–7
[LSB]
Power supply (+5V)
Chip select input from IIC interface (IC901)
Serial clock input from IIC interface (IC901)
Serial data input from IIC interface (IC901)
Serial data output. (Not used)
Serial/parallel select
NR effect level control input
NR effect level control input
Block size select input
Power supply (+5V)
RAS signal for DRAM (Connected to ground)
CAS signal for DRAM (Connected to ground)
Write enable signal for DRAM (Connected to ground)
Ground
DRAM data input (Connected to ground)
DRAM data input (Connected to +5V)
DRAM data input (Connected to +5V)
DRAM data input (Connected to ground)
DRAM data input (Not used)
DRAM data input (Connected to +5V)
DRAM data input (Not used)
DRAM data input (Connected to ground)
Ground
Pin Name
VSS
BI7
BI6
BI5
BI4
BI3
BI2
BI1
BI0
VSS
Y/GI7
Y/GI6
Y/GI5
Y/GI4
Y/GI3
Y/GI2
Y/GI1
Y/GI0
VSS
C/RI7
C/RI6
C/RI5
C/RI4
C/RI3
C/RI2
C/RI1
C/RI0
VDD
XCS
XSCK
SDI
SDO
SXP COM
BLCKNR0
BLCKNR1
BLCKSIZE
VDD
BLCKST0
BLCKST1
BLCKST2
VSS
BLOCKST3
CORON
ADVD
ADVS
HVCC
HVCCT
VCP
VCPT
VSS
• IC301 NOISE REDUCTION (CXD1854Q)/VIDEO board