Sony STR-DA3200ES - Block Diagram - HDMI TRANSCEIVER Section

STR-DA3200ES/DG1000
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STR-DA3200ES/DG1000
6-4. BLOCK DIAGRAM – HDMI TRANSCEIVER Section –
HDMI BUS
• SIGNAL PATH
: AUDIO (DIGITAL)
: VIDEO
HDMI CONTROLLER
IC3509 (1/2)
CN5002
HDMI
ASSIGNABLE
IN 2
SD0
84
SD1
83
SD2
82
R1X2+
71
R1X2–
70
1
3
R1X1+
67
R1X1–
66
4
6
R1X0+
63
R1X0–
62
7
9
R1XC+
59
R1XC–
58
10
DATA2+
DATA2–
DATA1+
DATA1–
DATA0+
DATA0–
CLOCK+
CLOCK–
SCL (5V)
SDA (5V)
+5V POWER
18
12
15
16
SD3
81
SPDIF
78
MCLK
88
SCK
86
WS
D3508
85
MUTEOUT
77
HSYNC
2
VSYNC
3
DE
1
ODCK
121
HOT PLUG
DETECT
Q3502, 3504
LEVEL
SHIFT
Q3507
Q0 – Q23 D0 – D23
104
INT
HDMI RECIVER
IC3505
AIN11
73
AIN10
71
AIN12
CVBS IN
Y IN
C IN
75
AIN6
76
AIN5
74
AIN4
CY IN
CB IN
CR IN
72
VIDEO A/D CONVERTER
IC3526
32
RX_INT
102
RESET#
33
RX_RST
61
MUTE
3
INT
73
ADV7403_INT
78
RESET
72
ADV7403_RST
36
RX_HPG_DTCT01
24
21
DSCL1
30
DSDA1
29
CN5001
HDMI
ASSIGNABLE
IN 1
R0X2+
52
R0X2–
51
1
3
R0X1+
48
R0X1–
47
4
6
R0X0+
44
R0X0–
43
7
9
R0XC+
40
R0XC–
39
10
DATA2+
DATA2–
DATA1+
DATA1–
DATA0+
DATA0–
CLOCK+
CLOCK–
SCL (5V)
SDA (5V)
+5V POWER
18
12
15
16
LEVEL
SHIFT
IC3501
(2/3)
HOT PLUG
DETECT
Q3501, 3503
LEVEL
SHIFT
Q3506
DSCL0
32
DSDA0
31
R0PWR5V
34
35
RX_HPG_DTCT00
CSDA
CSCL
MAINCPU_TX38
MAINCPU_RX39
RESET14
CSCL
CSDA
HDMI TX
HDMI RX
HDMI RESET
28
CSCL
27
CSDA
82
SCLK
81
SDA
X3501
28.322MHz
XTALIN
97
XTALOUT
96
X3503
28.63636MHz
XTAL
38
20
22
SD0
SD1
SD2
SD0
SPDIF
SD1 SD2
SD3
SPDIF
MCKO
BCKO
LRCKO
SD3
MCKO
BCKO
LRCKO
MUTEOUT
DE
DCK
HSYNC
VSYNC
I/H BUS
19
19
SDA2
16
SCLK2
34
EN1_HDMI1
43
EN2_HDMI2
D3509
LLC1
36
SFL/SYNC_OUT
15
CS/HS
4
VS
99
HS
VS
27M OUT
SFL
144 – 140,
137, 136,
133 – 129,
126 – 123,
119 – 116,
113 – 110
C0 – C9 C0 – C9
44 – 41,
28 – 25,
23, 22
V0/Y0 –
V9/Y9
V0 – V9
23
21, 20,
10 – 7,
94 – 91
LEVEL
SHIFT
IC3501
(1/3)
R1PWR5V
33
LEVEL
SHIFT
IC3913
LEVEL
SHIFT
IC3914
DATA SELECTOR
IC3504
EEPROM
IC3502
B
9
2Y2 2
2Y32-COM
4SDA 5 3
1-COM
13
SCL 6
WP 7
2Y0 1
2Y1
5
A
10
INH
6
1Y2 15
1Y3
11
1Y0
Q3505
12
1Y1
14
BUS SWITCH
+5V
LEVEL
SHIFT
Q3510
LEVEL
SHIFT
Q3508
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