STR-DN860/DN1060
97
Pin No. Pin Name I/O Description
AC2 NC - Not used
AC3 DDRVCCIO1 - Power supply terminal (+1.5V)
AC4 DGND12_K - Ground terminal
AC5 AVDD33_MEMPLL - Power supply terminal (+3.3V)
AC7 DDRVREF_C I Reference voltage (+0.75V) input terminal for SD-RAM
AC8 RDQM2 O Data mask signal output to the SD-RAM
AC9 DGND12_K - Ground terminal
AC10 RBA0 O Bank address signal output to the SD-RAM
AC11 DDRVCCIO1 - Power supply terminal (+1.5V)
AC12 RA6 O Address signal output to the SD-RAM
AC14 DDRVCCIO1 - Power supply terminal (+1.5V)
AC15 RBA1 O Bank address signal output to the SD-RAM
AC17,
AC18
RDQ10, RDQ15 I/O Two-way data bus with the SD-RAM
AC19 DDRVCCIO1 - Power supply terminal (+1.5V)
AC21 NFRBN2 - Not used
AC24 GPIO27 O WOL (wake-on-LAN) wake-up signal output to the system controller “H”: wake-up
AC25 DDC_SCL_RX2 O I2C clock signal output to the HDMI IN 2 connector
AC26 CEC2 - Not used
AC27 TXVN_1 - Not used
AC28 TXVP_1 - Not used
AD1 NC - Not used
AD2, AD3 NC - Not used
AD4 AVSS33_MEMPLL - Ground terminal
AD8 RA13 O Address signal output to the SD-RAM
AD9 RRESET O Reset signal output to the SD-RAM “L”: reset
AD10 RCAS_ O Column address signal output to the SD-RAM
AD11 to
AD15
RA14, RA8, RA1,
RA10, RA12
O Address signal output to the SD-RAM
AD16 to
AD18
RDQ8, RDQ12, RDQ14 I/O Two-way data bus with the SD-RAM
AD19 DDRVCCIO1 - Power supply terminal (+1.5V)
AD20 AVDD33_LDO - Power supply terminal (+3.3V)
AD21 NFRBN O Ready/busy selection signal output to the NAND fl ash “L”: busy, “H”: ready
AD22 NFCLE O Command latch enable signal output to the NAND fl ash
AD23 MDC - Not used
AD24 DDC_SDA_RX2 I/O Two-way I2C data bus with the HDMI IN 2 connector
AD25 PWR5V_RX I Power supply voltage (+5V) input from the HDMI IN 1 connector
AD26 HTPLG_RX_2 O Hot plug detection signal output to the HDMI IN 2 connector
AD27 REXT - External reference resistor connection terminal
AD28 HTPLG I Hot plug detection signal input from the HDMI ARC OUT connector
AE3 NC - Not used
AE5 DDRVCCIO1 - Power supply terminal (+1.5V)
AE6 to AE8
RDQ29, RDQ31,
RDQ30
I/O Two-way data bus with the SD-RAM
AE9 RWE_ O Write enable signal output to the SD-RAM
AE10 RODT O On die termination enable signal output to the SD-RAM
AE11 RRAS_ O Row address signal output to the SD-RAM
AE12 RA3 O Address signal output to the SD-RAM
AE13 RCSX_ - Not used
AE14 RA4 O Address signal output to the SD-RAM
AE16 RDQ11 I/O Two-way data bus with the SD-RAM
AE17 RDQM1 O Data mask signal output to the SD-RAM
AE18 RDQ13 I/O Two-way data bus with the SD-RAM
AE19,
AE20
DVCC33_IO_STB - Power supply terminal (+3.3V)
AE21 NFREN O Read enable signal output to the NAND fl ash
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