Chapter 2: Installation
2-15
10
9
21
BIOS LICENSE
1
3
JBT1
JSD1
1
3
JSTBY1
1
T-SGPIO1
12
78
T-SGPIO2
12
78
JTPM1
12
19 20
JPCIE7
DIMM1
DIMM4
DIMM3
DIMM2
102
JPCI1
A1
B1
B2
JPCIE9
JUSBLAN2
JAUDIO1
J32
J15
21
7
J13
10
21
7
JD1 41
4
1
SP1
+
JWD1
JPL1
1
3
JPME2
1
3
JPME1
1
3
JPUSB1
13
JPUSB2
1
3
1
3
JCPUVRD_SMB
3
1
3
1
JPL2
3
1
R616
C
A
CATERR_LED
LED1
A
C
JPCIE6
B17
B18
A17
A18
JPCIE8
JPCIE5
J30
5
1
HDMI_
B1
+
C3102
JSPDIF_IN
JSPDIF_OUT
1
JL1
1
JI2C2
1
JI2C1
JUSB4
11
10
19
1
B49
B48
A49
A48
Tested to Comply
With FCC Standards
FOR HOME OR OFFICE USE
MAC CODE BAR CODE
MH3
MH4
MH9
MH5
MH1
MH2
MH6
MH7
MH8
1-2:RST
2-3:NMI
JWD1
JPL1:
2-3:DISABLE
1-2:ENABLE
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME1:
2-3:ME RECOVERY
JPME2:
1-2:NORMAL
JPW3
JPL2
1-2:Enable
2-3:Disable
USB3.0 1/2
1-2:Enable
JPUSB1:USB1 WAKE UP
2-3:Disable
1-2:Enable
JPUSB2:USB2 WAKE UP
2-3:Disable
JPAC1
PCH SLOT2 PCI-E 2.0 X4 (INX8)
CPU1 SLOT7 PCI-E 2.0 X4
FANA
USB2/3
CMOS CLEAR
SPEAKER:1-4
JD1:
BUZZER:3-4
JL1:
CHASSIS INTRUSION
PWR
RST
JF1
ON
LED
X
OH/FF
NIC2
NIC1
HDDPWR
LEDLED
BUZZER
POWER LED
JLED
FAN3
FAN2
FAN1/CPU FAN
ALWAYS POPULATE BLUE SOCKET FIRST
AUDIO FP
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
JPW2
JPW1
COM2
SLOT1 PCI 33MHZ
USB11/12
USB0/1
USB4/5
USB10/13
USB3.0 3/4
COM1
VGA/
HDMI1/2
LAN2
LAN1
I-SATA0
I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
PCH SLOT3 PCI-E 2.0 X1
CPU1 SLOT4 PCI-E 3.0 X8 (INX16)
CPU1 SLOT6 PCI-E 3.0 X16
PCH SLOT5 PCI-E 2.0 X1
JI2C1/JI2C2
OFF:Disable
ON:Enable
KB/MOUSE/USB8/9
CPU
DIMMA1
DIMMB2
DIMMA2
DIMMB1
X9SAE
REV:1.01
DESIGNED IN USA
A. Backpanel USB 2.0 #9
B. Backpanel USB 2.0 #8
C. Backpanel USB 2.0 #13
D. Backpanel USB 2.0 #10
E. Backpanel USB 2.0 #3
(USB 3.0 #4)
F. Backpanel USB 2.0 #2
(USB 3.0 #3)
G. Front Panel USB 2.0 #4/5
H. Front Panel USB 2.0 #11/12
I. Front Panel USB 2.0 #0/1
(USB 3.0 #1/2)
Universal Serial Bus (USB)
Four Universal Serial Bus 2.0 ports #2, #3, #8, #9, #10, #13, USB 3.0 #3, #4,
are located on the I/O back panel. USB 2.0 headers #4/5, #11/12, #0/1 and USB
3.0 header #1/2 are used to provide front chassis access using USB cables (not
included). See the tables below for pin denitions.
Back Panel USB (2.0)
Pin Denitions
Pin# Denition Pin# Denition
1 +5V 5 +5V
2 USB_PN1 6 USB_PN0
3 USB_PP1 7 USB_PP0
4 Ground 8 Ground
Front Panel USB (2.0)
Pin Denitions
Pin # Denition Pin # Denition
1 +5V 2 +5V
3 USB_PN2 4 USB_PN3
5 USB_PP2 6 USB_PP3
7 Ground 8 Ground
9 Key 10 Ground
A
Front Panel USB (3.0)
Pin Denitions
P i n # Signal Name Description
1 VBUS Power
2 IntA_P1_SSRX- USB 3.0 Port 1 SuperSpeed RX-
3 IntA_P1_SSRX+ USB 3.0 Port 1 SuperSpeed RX+
4 GND GND
5 IntA_P1_SSTX- USB 3.0 Port 1 SuperSpeed TX-
6 IntA_P1_SSTX+ USB 3.0 Port 1 SuperSpeed TX+
7 GND GND
8 IntA_P1_D- USB 3.0 Port 1 D- (USB 2.0 Signal D-)
9 IntA_P1_D+ USB 3.0 Port 1 D- (USB 2.0 Signal D+)
10 ID Over Current Protection
11 IntA_P2_D+ USB 3.0 Port 2 D+ (USB 2.0 Signal D+)
12 IntA_P2_D- USB 3.0 Port 2 D- (USB 2.0 Signal D-)
13 GND GND
14 IntA_P2_SSTX+ USB 3.0 Port 2 SuperSpeed TX+
15 IntA_P2_SSTX- USB 3.0 Port 2 SuperSpeed TX-
16 GND GND
17 IntA_P2_SSRX+ USB 3.0 Port 2 SuperSpeed RX+
18 IntA_P2_SSRX- USB 3.0 Port 2 SuperSpeed RX-
19 VBUS Power
C
E
B