ix
Table of Contents
CPUConguration ....................................................................................... 4-6
Hyper-threading .......................................................................................... 4-7
Active Processor Cores .............................................................................. 4-7
Limit CPUID Maximum ............................................................................... 4-7
Execute Disable Bit (Available if supported by the OS & the CPU) .......... 4-7
Hardware Prefetcher (Available when supported by the CPU) ................. 4-7
Adjacent Cache Line Prefetch (Available when supported by the CPU) ... 4-7
DCU Streamer Prefetcher ......................................................................... 4-7
DCU IP Prefetcher .................................................................................... 4-7
Intel® Virtualization Technology (Available when supported by the CPU) 4-8
Clock Spread Spectrum ............................................................................ 4-8
CPUPowerManagementConguration ...................................................... 4-8
Power Technology ...................................................................................... 4-8
EIST ............................................................................................................ 4-8
P-STATE Coordination ............................................................................... 4-8
Package C-State limit ................................................................................. 4-9
Factory Long Duration Power Limit............................................................ 4-9
Long Duration Power Limit ......................................................................... 4-9
Factory Long Duration Maintained ............................................................ 4-9
Long Duration Maintained ......................................................................... 4-9
Recommended Short Duration Power Limit ............................................... 4-9
Short Duration Maintained ........................................................................ 4-9
ChipsetConguration ................................................................................. 4-10
North Bridge ............................................................................................... 4-10
VT-d .......................................................................................................... 4-10
Memory ECC Support ............................................................................. 4-10
PCI Express Port .................................................................................... 4-10
PEG Force Gen1 .................................................................................... 4-10
South Bridge ................................................................................................4-11
High Precision Timer .................................................................................4-11
USBConguration .......................................................................................4-11
SATAConguration .................................................................................... 4-12
SATA Mode ............................................................................................... 4-12
PCIe/PCI/PnPConguration ..................................................................... 4-12
Above 4G Decoding ................................................................................. 4-12
VGA Palette Snoop .................................................................................. 4-13
PERR# Generation ................................................................................... 4-13
SERR# Generation ................................................................................... 4-13