122
b. When
0704
turns on, its
collector
drops
to
L' level and C708 discharges
momentarily.
Therefore, pin 13
of
U701 drops
to
L level.
This
inverts gate A, causing a H level at
pin
11
of
U701 .
After
inversion
by
gate
B,
an
L level occurs at pin 8
of
U701.
c.
When pin 8
of
U701
has
dropped
to
L
level, current flows through the
PEAK
LED
and the peak indicator lights.
d.
Alternately,
the L level
at
pin
8
of
U701
is
transmitted
to
pin 12
of
U701 via resis-
tor
R716.
If
R716
is
open,
pin
1'2
of
U701
would
not
fait
to
L level when the collec-
tor
of
0704
has
dropped
to
L level
be-
cause
of
the presence
of
diode
0703.
In
this
case,
operation
would
not
be
stable.
e.
When the
input
level falls
below
the
threshold level
of
0704,
its
base
current
stops, turning
it
off.
f. When
0704
has
turned
off,
current
flows
into
C708 via R715
to
charge
it.
The
voltage across C704 (the voltage
at
@)
rises
as
shown in Fig. 3-29.
g. When the voltage at @
has
risen
to
a cer-
tain level (E1: approx. +2.0
V),
U701
regards the
input
at
pin 13
as
H level.
Waveform © represents the voltage
at
@
as
logic level.
h. When the charging
of
C70B proceeds and
the voltage at @ reaches E2
which
is
ap-
proximately
0.6 V higher than E 1
(forward
voltage
drop
of
D703),-U701 regards
the
input
at pin 12
as
H level.
At
this
moment,
gate A
is
inverted since pins 12 and 13
of
U701 are
both
H level, and the
output
from
pin
11
of
U701 drops
to
L level.
i.
Therefore, gate B
is
also inverted and the
output
of
U701 pin 8
turns
to
H level. As
a result,
current
supplied
to
the
PEAK
LED
is
cut
off
and the peak
indicator
goes
out.
As described above, the peak
indicator
circuit
in-
. corporates a pulse stretching
function
that
keeps.
the peak
indicator
lit
for
a certain length
of
time
even
when the
duration
of
the
input
signal
is
very short.
34
3-13. RECORD
CIRCUITS
3-13-1
Line
input
circuits
See
Fig. 3-30.
The deck
has
two
line
input
circuits.
LINE
1
is
provided at the back
of
the deck and
LIN
E 2
on the
front
panel. The
INPUT
switch deter-
mines
which
line
input
is
used. Signals
from
the
LINE
1 and
LINE
2
input
terminals cannot
be
mixed.
To
use
the
BIAS/REC
calibration
circuit,
set the I
NPUT
switch
at
TEST
and
apply
input
signals
to
the
LINE
1 terminals.
With
its level adjusted
by
the ,RECORD volume
control,
the
line
input
signal selected
by
the
INPUT
switch
is
sent
to
Do
'
iby
encoder U301.
MPX
filter
U305
connected
to
U301 removes
subcarrier and
pilot
signals
which
are
mixed
with
line
input
signals when recording FM
broadcasts in order
to
prevent the
Dolby
encoder
from
mis-operation.
The
MPX
filter
operates
only
when transistors
0301
and
0302
are
both
on. When
they
are
off,
the signals simp-
ly
pass
through
the fi!,ter.
0301
and
0302
are ·
on
only
when the N R SYSTEM switch
is
set
to
NR
or
N
R+HX:
that
is, when U301
is
operat-
ing
as
an
encoder.
Whatever
the
position
of
the NR SYSTEM
switch,
an
unmodified
input
signal
is
output
from
pin 3
of
U301
to
the
monitor
circuit.
When the N R SYSTEM switch
is
set
to
N R
or
.
NR+HX,
an
encoded signal
is
output
from
pin
7
of
U301. When the
switch
is
at
OUT,
an
un-
modified
input
signal
is
output.
The
output
from
pin
7 is
input
to
the line
amplifier
via the
HX
variable equalizer. (Refer
to
3-14
for
the
HX
variab'
le
equalizer.)
3·13-2
Line
amplifier
See
Fig. 3-31.
Recording level adjusting
circuit
BIAS/REC
CALIBRATION
is
included in the
input
circuit
of
the line
amplifier.
When the
CALIBRATION
switch is set
at
ADJUST, the recording level
can
be adjusted
with
semi-fixed resistor R30.
At
this
time
ADJUST
LED
01
lights.
A temperature compensation
circuit
comprising
thermistor
RT11 is located
in
parallel
with
the
output
line
of
the line
amplifier.
The
output
of
the line
amplifier
is
sent
to
the
recording level adjusting
circuit
after
the record
signal level
has
been adjusted
to
match the
type
of
tape being used.
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