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Toshiba T300MVi MEDIUM VOLTAGE - Interface - Pulse Output and Digital Input

Toshiba T300MVi MEDIUM VOLTAGE
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- 26
INTERFACE (cont’d)
Pulse Signal Output
If a speed sensor is used, speed feedback signals can be output as pulse signals. The PG pulse
output circuit is shown in the following figure. The power supply for the pulses should supplied from an
outside source in a range of 12 V to 24 V. The number of pulses per revolution output can be set using the
parameter CS_PGOUT when a resolver is used. See the parameter setting manual for exact settings.
Otherwise, set to zero when using a PG. With a PG, the number of pulses out equals the number of pulses
in. This output is limited to 10kHz.
The PG pulse output consists of two phases of PGA and PGB at 90° separation. These pulse
signals (at the level of the power supplied from an outside source) are isolated from the control power
supply of the drive through photo-couplers.
Pulse Output Circuit
Digital Input
A total of 7 programmable digital inputs (DI1 to DI7) are provided. Only DI1 is capable of accepting
an external voltage input (24VDC) DI2-7 are hard connected to the drive’s internal 24VDC power supply and
should only be connected to dry contacts. These input signals can be individually assigned to bits in the
DI_EX1, 2, 3, or 4 words. The available input assignments are shown below. For more detail refer to the
parameter setting manual.
Digital Input Options
Bit DI_EX1 DI_EX2 DI_EX3 DI_EX4
15 IL * QSTOP MV_JOG_B3
14 UVS * UVS MV_JOG_B2
13 EXT0 * EXT0 MV_JOG_B1
12 SPA1 SPA4 * MV_JOG_B0
11 BRTST SPA3 * EX_LMT_I1
10 ST SPA2 ST EX_LMT_TR
9 F BLA F SP_UP_DI
8 R M_FN ** R SP_DN_DI
7 3S OH_ACL 3S SEL_DI
6 2S E_DRIVE 2S DIR0_DI
5 B HOLD * DIR1_DI
4 FLD QSTOP FLD START0_DI
3 BC F_LMT LATCH_PG_POS START1_DI
2 SPA0 R_LMT SPA0 STOP0_DI
1 EXRST B_HLTY EXRST STOP1_DI
0 R_TEN BA R_TEN EXT1
“*” Not used “**” Available with 03C and up software only
PGB PGA
0V
+12V~48V
100mA max
TB1-18
TB1-19
TB1-20
TB1-21
TB1-22
TB1-23

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