Wang 5536 - Page 20

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2.3.1.4 Video Control Logic
Video control logic produces a four- level
analog signal for CRT
electronics. The four levels provide:
o Normal display/intensified display
o Blanked display/synch pulses (intensified blanking)
The analog signal is digitally generated and controlled. It causes char-
acters to be displayed at normal intensity, high intensity, underlined, and
blinking. It also displays an intensified and blinking, double-lined
cursor, and manages CRT blanking.
Information is blanked during vertical and horizontal retrace, each time
CRT memory is updated or read by the CPU, and between characters while the
character-video shift register is being loaded.
2.3.1.5 CRT Memory Input/Output Control
The Z80A CPU employs the same control signals to read information from the
CRT memory bu ff er and to read main memory. Mapping the CRT memory bu ff er
into the top 16K of the Z80A memory-addressing range speeds the frequent
CRT display updates required for word processing. This upper addressing
range may be reassigned by software to serve as main memory.
Unlike main memory, neither the Data Link nor the Disk can employ DMA to
read CRT memory. This is a consequence of the Row/Column addressing scheme
used by CRT memory.
The Control Input and Output Buffers are dis ab led and the character-output
buffer cleared both during a Power-Up Reset and when bad parity is found.
Either condition freezes the CRT display and forces zeros onto the Data Bus.
Data is clocked into the character buffer at the end of a CRT character
time while CRT memory is being addressed from the bus. The bus does not
address CRT memory unless a high address is received with a Memory Request
asserted; Workstation OMA devices do not. use Memory Request and cannot
write into CRT memory.
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