Table 6: SOM240_2 Signal Pins (cont'd)
Pin Number Signal Name Signal Description
A37 GND Ground
A38 HPC15_CC_P HPIO clock-capable pin on bank 64
A39 HPC15_CC_N HPIO clock-capable pin on bank 64
A40 GND Ground
A41 HPC03_P HPIO on bank 64
A42 HPC03_N HPIO on bank 64
A43 GND Ground
A44 VCCO_HPB HPB I/O voltage rail, 1.0V to 1.8V
A45 GND Ground
A46 HDB18 HDIO on bank 43
A47 HDB19 HDIO on bank 43
A48 HDB20 HDIO on bank 43
A49 GND Ground
A50 HDB21 HDIO on bank 43
A51 HDB22 HDIO on bank 43
A52 HDB23 HDIO on bank 43
A53 GND Ground
A54 HDC18 HDIO on bank 44
A55 HDC19 HDIO on bank 44
A56 HDC20 HDIO on bank 44
A57 GND Ground
A58 HDC21 HDIO on bank 44
A59 HDC22 HDIO on bank 44
A60 HDC23 HDIO on bank 44
Connector Row B
B1 GTH_DP2_C2M_P GTH Lane 2 RX
B2 GTH_DP2_C2M_N GTH Lane 2 RX
B3 GND Ground
B4 GND Ground
B5 GTH_DP2_M2C_P GTH Lane 2 TX
B6 GTH_DP2_M2C_N GTH Lane 2 TX
B7 GND Ground
B8 GND Ground
B9 GTH_DP0_C2M_P GTH Lane 0 RX
B10 GTH_DP0_C2M_N GTH Lane 0 RX
B11 GND Ground
B12 HPB10_CC_P HPIO on bank 65
B13 HPB10_CC_N HPIO on bank 65
B14 GND Ground
Chapter 2: Electrical Design Considerations
UG1091 (v1.0) April 20, 2021 www.xilinx.com
Carrier Card Design for Kria SOM 20
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