Xilinx VC707 User Manual

VC707 Evaluation Board www.xilinx.com 105
UG885 (v1.4) May 12, 2014
VC707 Board XDC Listing
set_property PACKAGE_PIN H13 [get_ports DDR3_D10]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D10]
set_property PACKAGE_PIN J13 [get_ports DDR3_D11]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D11]
set_property PACKAGE_PIN L16 [get_ports DDR3_D12]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D12]
set_property PACKAGE_PIN L15 [get_ports DDR3_D13]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D13]
set_property PACKAGE_PIN H14 [get_ports DDR3_D14]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D14]
set_property PACKAGE_PIN J15 [get_ports DDR3_D15]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D15]
set_property PACKAGE_PIN E15 [get_ports DDR3_D16]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D16]
set_property PACKAGE_PIN E13 [get_ports DDR3_D17]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D17]
set_property PACKAGE_PIN F15 [get_ports DDR3_D18]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D18]
set_property PACKAGE_PIN E14 [get_ports DDR3_D19]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D19]
set_property PACKAGE_PIN G13 [get_ports DDR3_D20]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D20]
set_property PACKAGE_PIN G12 [get_ports DDR3_D21]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D21]
set_property PACKAGE_PIN F14 [get_ports DDR3_D22]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D22]
set_property PACKAGE_PIN G14 [get_ports DDR3_D23]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D23]
set_property PACKAGE_PIN B14 [get_ports DDR3_D24]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D24]
set_property PACKAGE_PIN C13 [get_ports DDR3_D25]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D25]
set_property PACKAGE_PIN B16 [get_ports DDR3_D26]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D26]
set_property PACKAGE_PIN D15 [get_ports DDR3_D27]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D27]
set_property PACKAGE_PIN D13 [get_ports DDR3_D28]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D28]
set_property PACKAGE_PIN E12 [get_ports DDR3_D29]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D29]
set_property PACKAGE_PIN C16 [get_ports DDR3_D30]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D30]
set_property PACKAGE_PIN D16 [get_ports DDR3_D31]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D31]
set_property PACKAGE_PIN A24 [get_ports DDR3_D32]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D32]
set_property PACKAGE_PIN B23 [get_ports DDR3_D33]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D33]
set_property PACKAGE_PIN B27 [get_ports DDR3_D34]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D34]
set_property PACKAGE_PIN B26 [get_ports DDR3_D35]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D35]
set_property PACKAGE_PIN A22 [get_ports DDR3_D36]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D36]
set_property PACKAGE_PIN B22 [get_ports DDR3_D37]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D37]
set_property PACKAGE_PIN A25 [get_ports DDR3_D38]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D38]
set_property PACKAGE_PIN C24 [get_ports DDR3_D39]
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Xilinx VC707 Specifications

General

Brand	Xilinx
Model	VC707
Category	Motherboard
Language	English