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Xilinx Virtex-6 FPGA Getting Started Guide

Xilinx Virtex-6 FPGA
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Virtex-6 FPGA
Connectivity Kit
Getting Started Guide
UG664 (v1.4) July 6, 2011
XPN 0402826-03

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Xilinx Virtex-6 FPGA Specifications

General IconGeneral
Technology40nm
Clock Data Recovery (CDR)Integrated
Logic CellsUp to 760, 000
I/O PinsUp to 1200
Transceiver FeaturesPre-emphasis, equalization
Transceiver Protocol SupportPCIe, SATA, Ethernet, CPRI, OBSAI, Serial RapidIO
Power ConsumptionVaries by model and configuration
Transceiver TypeMulti-Gigabit Transceivers (RocketIO GTP/GTX)

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