Xilinx Virtex-6 FPGA Getting Started Guide

62 www.xilinx.com Virtex-6 FPGA Connectivity Kit Getting Started
UG664 (v1.4) July 6, 2011
Next Steps
Software Device Driver and Software Application/GUI Files and Scripts
Figure 60 shows the design module for the software device driver and the software
application/GUI files and scripts. Figure 61 shows the design file structure for the software
device driver and the software application and GUI.
X-Ref Target - Figure 60
Figure 60: Software Device Driver and Software Application/GUI Design Module
UG664_24_052810
x4 PCIe Link @ 5.0 Gb/s or
x8 PCIe Link @ 2.5 Gb/s
Base DMA Driver
Raw Data Driver
XAUI Driver
GUI
X-Ref Target - Figure 61
Figure 61: Software Device Driver and Software Application/GUI Files
v6_pcie_10Gdma_ddr3_xaui_axi
linux_driver
UG664_25_060911
design readme
xdma
xaui
xrawdata doc
Makefile
xpmon
v6_trd_lin_driver_build
v6_trd_lin_driver_insert
v6_trd_lin_driver_remove
v6_trd_lin_app_gui
windows_driver
xdma
xpmon
x_v6_trd_setup.exe
v6_trd_lin_quickstart
utils
xrawdata
xaui

Xilinx Virtex-6 FPGA Specifications

General

Brand	Xilinx
Model	Virtex-6 FPGA
Category	Transceiver
Language	English