Xilinx Virtex-6 FPGA

UG664 (v1.4) July 6, 2011 www.xilinx.com Virtex-6 FPGA Connectivity Kit Getting Started
07/06/11 1.4
(Cont’d)
Updated step 1 on page page 33. Removed Figure 25: Launch the Performance Monitor
and Status GUI, and Figure 26: Run v6_trd_quickstart. Corrected coregen command in
step 4c on page 42. Updated ending step instruction from step 8 to step 6 in Test Setup.
Added Windows Driver. Added Linux Driver heading before step 1 on page 56.
Updated step 2a and step 3a on page 56. Updated Table 1. Updated Figure 52 Figure 54,
and Figure 61.
Date Version Revision