Xilinx Virtex-6 FPGA

34 www.xilinx.com Virtex-6 FPGA Connectivity Kit Getting Started
UG664 (v1.4) July 6, 2011
Evaluating the Virtex-6 FPGA Connectivity TRD
3. Execute the test and view payload statistics in Performance Monitor:
a. Click Start Test to start the performance test.
b. View the payload statistics to review data transfers on the XAUI Path and Raw
Data Path channels of the DMA engine (see Figure 25).
X-Ref Target - Figure 25
Figure 25: Payload Statistics
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