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Xilinx ZCU104 User Manual

Xilinx ZCU104
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ZCU104 Board User Guide 28
UG1267 (v1.1) October 9, 2018 www.xilinx.com
Chapter 3: Board Component Descriptions
The ZCU104 board DDR4 64-bit component PS memory interface adheres to the constraints
guidelines documented in the “PCB Guidelines for DDR4” section of UltraScale Architecture
PCB Design User Guide (UG583) [Ref 4]. The ZCU104 DDR4 PS component interface is a 40
impedance implementations. Other memory interface details are also available in the
UltraScale Architecture FPGAs Memory Interface Solutions Product Guide (PG150) [Ref 5]. For
more details, see the Micron MT40A256M16HA-083E data sheet at the Micron website
[Ref 11].
AP33 DDR4_CS_B L7 CS_B U2,U99-U101
R156 P/D DDR4_TEN N9 TEN U2,U99-U101
Table 3-3: DDR4 Component Memory Connection to XCZU7EV PS Bank 504 (Cont’d)
XCZU7EV (U1)
Pin
Net Name
DDR4 Component Memory
Pin # Pin Name Ref. Des.
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Xilinx ZCU104 Specifications

General IconGeneral
BrandXilinx
ModelZCU104
CategoryMotherboard
LanguageEnglish

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