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Zynq UltraScale+ User Manual

Zynq UltraScale+
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RFSoC Data Converter Evaluation Tool User Guide 11
UG1287 (v2018.2) October 1, 2018 www.xilinx.com
Chapter 1: Introduction
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AXI interconnect
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AXI Streaming IPs
Auxiliary peripherals
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SD
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I2C
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PS-GPIO
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Gigabit Ethernet
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UART
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JTAG
Software Components
Operating systems
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APU: SMP Linux
Linux frameworks
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Ethernet
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Clock
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Contiguous memory allocator (CMA)
User applications
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APU: Ethernet-based server application
RFDC driver-based features
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Digital down conversion (DDC)/digital up conversion (DUC)
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Nyquist Mix mode
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Digital complex mixers
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Quadrature modulation correction (QMC)
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Internal PLL
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ADC calibration
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DAC high linearity and low noise
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Inverse sinc filter
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DAC Output Current mode (20 or 32 mA)
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External clock driver
AXI-DMA client driver
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Zynq UltraScale+ Specifications

General IconGeneral
BrandZynq
ModelUltraScale+
CategoryMedia Converter
LanguageEnglish