RFSoC Data Converter Evaluation Tool User Guide 7
UG1287 (v2018.2) October 1, 2018 www.xilinx.com
Chapter 1: Introduction
Zynq UltraScale+ RFSoC Overview
The Zynq UltraScale+ RFSoC family integrates the key subsystems required to implement a
complete software-defined radio including direct RF sampling data converters, enabling
CPRI and Gigabit Ethernet-to-RF on a single, highly programmable SoC.
Each RFSoC offers multiple RF-sampling analog-to-digital (RF-ADC) and RF-sampling
digital-to-analog (RF-DAC) data converters. The RF-ADC supports a maximum sample rate
of 4 GSPS with dynamic range and has a signal bandwidth of up to 4 GHz. The RF-DAC can
clock at up to 6.554 GSPS with an output signal bandwidth of greater than 4 GHz. The RF
data converters also include power efficient digital down converters (DDCs) and digital up
converters (DUCs) that include programmable interpolation, decimation rates, a
numerically controlled oscillator (NCO), and a complex mixer. The DDCs and DUCs can also
support multi-band operation. Figure 1-1 shows the block diagram of the Zynq UltraScale+
RFSoC RF Data Converter.
X-Ref Target - Figure 1-1
Figure 1-1: Zynq UltraScale+ RFSoC RF Data Converter in RFSoC
Zynq UltraScale+ RFSoC
Control and
Configuration
Data Converter IP Core
Processing System
Quad ARM Cortex-A53
Dual ARM Cortex-R5
GTY Serial
Transceivers
Programmable
Logic
DUC
AXI4-Stream
DUC
AXI4-Stream
8 TX Channels
DDC
AXI4-Stream
DDC
AXI4-Stream
8 RX Channels
AXI4-Lite
DAC
DAC
ADC
ADC
X21232-092118
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