RFSoC Data Converter Evaluation Tool User Guide 6
UG1287 (v2018.2) October 1, 2018 www.xilinx.com
Chapter 1: Introduction
This user guide describes the architecture of the design and provides a functional
description of its components. It is organized as follows:
Chapter 1, Introduction (this chapter) provides a high-level overview of the Zynq
UltraScale+ RFSoC device architecture, the design architecture, and a summary of key
features.
Chapter 2, Package Details gives an overview of the design modules and design
components that make up this design.
Chapter 3, Hardware Design describes the hardware platform of the design including
key PS and PL peripherals.
Chapter 4, Clocking describes the details on clocking used for the design.
Chapter 5, Evaluation Tool System Configuration using the GUI describes the details of
system configuration and features supported using the GUI.
Chapter 6, Software Architecture describes the application processor unit (APU)
software platform including the Linux software stack and the Linux rftool application
running on the APU.
Chapter 7, Protocol Specification describes the protocol used to communicate between
the host and RFSoC.
Chapter 8, Zynq UltraScale+ RFSoC Data Converter Bare-metal/Linux Driver describes
where to get more information about the driver.
Chapter 9, System Considerations describes system architecture considerations
including boot flow and the system address map.
Appendix A, Reference Design Protocol Specification describes the commands used in
the software design.
Appendix B, Additional Resources and Legal Notices lists additional resources and
references.
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