bdiRDI
JTAG interface for RDI Debuggers, BDI1000 User Manual 19
© Copyright 1999-2003 by ABATRON AG V 1.10
3.1 Init CP15 Registers
Via the Initialization List it is possible to setup the Coprocessor 15 (CP15) registers. The address part
of a WCP15 init list entry uses a special format which depends on the used CPU type.
ARM710T, ARM720T,ARM740T:
The 16bit register number is used to build the appropriate MCR/MRC instruction to access the CP15
register.
+-----+-+-------+-------+-------+
|opc_2|0| CRm |0 0 0 0| nbr |
+-----+-+-------+-------+-------+
Normally opc_2 and CRm are zero and therefore you can simply enter the CP15 register number.
WCP15 0x0002 0x00004000 MMU: set Translation Base Address
ARM920T:
Via JTAG, CP15 registers are accessed either direct (physical access mode) or via interpreted MCR/
MRC instructions. Read also ARM920T manual, part "Debug Support - Scan Chain 15".
Register number for physical access mode (bit 12 = 0):
+-----+-+-----+-+-----+-+-------+
|0 0 0|0|0 0 0|i|0 0 0|x| nbr |
+-----+-+-----+-+-----+-+-------+
The bit "i" selects the instruction cache (scan chain bit 33), the bit "x" extends access to register 15
(scan chain bit 38).
Register number for interpreted access mode (bit 12 = 1):
+-----+-+-------+-----+-+-------+
|opc_2|1| CRm |opc_1|0| nbr |
+-----+-+-------+-----+-+-------+
The 16bit register number is used to build the appropriate MCR/MRC instruction.
ARM940T, ARM946E, ARM966E:
The CP15 registers are directly accessed via JTAG.
+-----+-+-----+-+-----+-+-------+
|0 0 0|0|0 0 0|i|0 0 0|x| nbr |
+-----+-+-----+-+-----+-+-------+
The bit "i" selects the instruction cache (scan chain bit 32), the bit "x" extends access to register 6
(scan chain bit 37).
WCP15 0x0005 0x0000000F data region 0/1 full access
WCP15 0x0105 0x0000000F inst region 0/1 full access
WCP15 0x0001 0x0000107D enable protection and caches
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