• Maximum clock deviation <±50 ppm nominal, <±100 ppm operational
• Jitter and W
ander according to ITU-T G.823 and G.825
• Buffer memory <250 μs, <100 μs asymmetric difference
• Format.G 704 frame, structured etc.Format.
• No CRC-check
Synchronization in PDH systems connected to SDH systems
• Independent synchronization, asynchronous mapping
• The actual SDH port must be set to allow transmission of the master clock from
the PDH-system via the SDH-system in transparent mode.
• Maximum clock deviation <±50 ppm nominal, <±100 ppm operational
• Jitter and Wander according to ITU-T G.823 and G.825
• Buffer memory <100 μs
• Format: Transparent
• Maximum channel delay
• Loop time <40 ms continuous (2 x 20 ms)
IED with echo synchronization of differential clock (without GPS clock)
• Both channels must have the same route with maximum asymmetry of 0,2-0,5 ms,
depending on set sensitivity of the differential protection.
• A fixed asymmetry can be compensated (setting of asymmetric delay in built in
HMI or the parameter setting tool PST).
IED with GPS clock
• Independent of asymmetry.
1MRK 505 370-UUS A Section 21
Requirements
Busbar protection REB670 2.2 ANSI 535
Application manual
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