ABB Relion 670 series - Page 471

a
b
a>b
OR
|I
OP
|
STx
AND
Pickupx
Characteristx=DefTime
DirModeSelx=Disabled
DirModeSelx=Non-directional
DirModeSelx=Forward
DirModeSelx=Reverse
AND
AND
FORWARD_In t
REVERSE_Int
OR
OR
STAGEx_DIR_Int
ANSI12000008-3-en.vsd
AND
AND
Characteristx=Inverse
Inverse
ANSI12 000008-3-en.vsd
0
0-tx
0
0-txMin
PUx
ANSI12000008 V3 EN-US
Figure 249: Simplified logic diagram for OC4PTOC
Greater
Comparator
Directional
Element
I3P
V3P
Directional
Release
Block
DFWDLx
DFWDLxx
DREVLx
DREVLxx
STLx
FORWARD_int
REVERSE_int
x- means three phases 1,2 and 3
xx – means phase to phase 12,23,31
ANSI15000266-1-en.vsdx
AngleRCA
AngleROA
PUminOpPhSel
ANSI15000266 V1 EN-US
Figure 250: OC4 directional release block diagram
1MRK 502 066-UUS B Section 8
Current protection
465
Technical manual